./goblint --conf conf/svcomp-validate.json --witness.yaml.unassume /mnt/goblint-svcomp/benchexec/results/247-all-validate-pr-1709-before/goblint.2025-03-13_10-21-57.files/SV-COMP25_unreach-call/tdg_vp_vmcall__cover__success_havoc_object.yml/witness.yml --witness.yaml.validate /mnt/goblint-svcomp/benchexec/results/247-all-validate-pr-1709-before/goblint.2025-03-13_10-21-57.files/SV-COMP25_unreach-call/tdg_vp_vmcall__cover__success_havoc_object.yml/witness.yml --sets ana.specification /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/properties/unreach-call.prp --sets exp.architecture 64bit /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i


--------------------------------------------------------------------------------


[0;33m[Warning] --sets is deprecated, use --set instead.[0;0;00m
[0;33m[Warning] --sets is deprecated, use --set instead.[0;0;00m
REDOREDOREDO[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5-3457:5 with factor 16
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:5-3462:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:5-3473:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5-3489:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5-3494:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:5-3499:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5-3569:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:5-3574:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3661:5-3666:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3698:5-3701:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3708:5-3712:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9-3727:9 with factor 16
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3715:5-3729:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3783:5-3786:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5-3818:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5-3830:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9-3876:9 with factor 16
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3864:5-3877:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4076:5-4078:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4109:5-4111:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4125:5-4127:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4191:5-4193:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5-4208:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5-4221:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4292:5-4301:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4332:5-4335:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5-4408:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4576:5-4591:5 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:5-4786:5 with factor 16
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4823:5-4829:5 with factor 16
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4893:9-4899:9 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4900:9-4903:9 with factor 8
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4904:9-4907:9 with factor 2
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4971:9-4977:9 with factor 4
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4978:9-4982:9 with factor 8
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4983:9-4986:9 with factor 2
[Info] no thread creation -> disabling analyses: "race, symb_locks, region, deadlock, maylocks, thread, threadid, threadJoins, threadreturn, mhp, pthreadMutexType"
[Info] SV-COMP specification: CHECK( init(main()), LTL(G ! call(reach_error())) )
[Error][Imprecise][Unsound] Function definition missing for tdx_seamret_to_vmm

[Info] runtime: 00:01:03.962
[Info] vars: 832, evals: 609

[Info] |called|=121

Memory statistics: total=30704.37MB, max=297.72MB, minor=28199.74MB, major=10992.09MB, promoted=8487.46MB
    minor collections=14967  major collections=295 compactions=0


[Info] runtime: 00:01:13.980
[Info] vars: 1151, evals: 855

[Info] |called|=96

Memory statistics: total=35967.54MB, max=297.72MB, minor=33461.70MB, major=12256.70MB, promoted=9750.87MB
    minor collections=17484  major collections=312 compactions=0


[Info] runtime: 00:01:23.995
[Info] vars: 1355, evals: 1013

[Info] |called|=95

Memory statistics: total=40889.53MB, max=297.72MB, minor=38382.58MB, major=13487.80MB, promoted=10980.85MB
    minor collections=19840  major collections=330 compactions=0


[Info] runtime: 00:01:34.016
[Info] vars: 1454, evals: 1093

[Info] |called|=95

Memory statistics: total=45588.57MB, max=342.38MB, minor=43080.52MB, major=14720.91MB, promoted=12212.86MB
    minor collections=22088  major collections=345 compactions=0


[Info] runtime: 00:01:44.042
[Info] vars: 1541, evals: 1167

[Info] |called|=95

Memory statistics: total=50272.66MB, max=342.38MB, minor=47763.56MB, major=15953.11MB, promoted=13444.01MB
    minor collections=24329  major collections=361 compactions=0


[Info] runtime: 00:01:54.068
[Info] vars: 1615, evals: 1230

[Info] |called|=92

Memory statistics: total=54963.16MB, max=342.38MB, minor=52453.01MB, major=17185.47MB, promoted=14675.32MB
    minor collections=26572  major collections=376 compactions=0


[Info] runtime: 00:02:04.081
[Info] vars: 1704, evals: 1303

[Info] |called|=95

Memory statistics: total=59699.05MB, max=342.38MB, minor=57187.85MB, major=18434.09MB, promoted=15922.89MB
    minor collections=28838  major collections=392 compactions=0


[Info] runtime: 00:02:14.097
[Info] vars: 1804, evals: 1477

[Info] |called|=115

Memory statistics: total=64327.70MB, max=342.38MB, minor=61815.45MB, major=19650.04MB, promoted=17137.79MB
    minor collections=31052  major collections=407 compactions=0


[Info] runtime: 00:02:24.112
[Info] vars: 2746, evals: 2069

[Info] |called|=58

Memory statistics: total=69780.31MB, max=342.38MB, minor=67266.72MB, major=20887.26MB, promoted=18373.67MB
    minor collections=33659  major collections=422 compactions=0


[Info] runtime: 00:02:34.127
[Info] vars: 2966, evals: 2251

[Info] |called|=56

Memory statistics: total=75780.71MB, max=342.38MB, minor=73265.76MB, major=22227.22MB, promoted=19712.27MB
    minor collections=36529  major collections=440 compactions=0


[Info] runtime: 00:02:44.140
[Info] vars: 3215, evals: 2554

[Info] |called|=104

Memory statistics: total=81714.50MB, max=342.38MB, minor=79198.24MB, major=23546.21MB, promoted=21029.95MB
    minor collections=39366  major collections=457 compactions=0

lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 

[Info] runtime: 00:02:54.154
[Info] vars: 4671, evals: 3685

[Info] |called|=66

Memory statistics: total=90369.55MB, max=342.38MB, minor=87852.16MB, major=24814.92MB, promoted=22297.53MB
    minor collections=43501  major collections=474 compactions=0

lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 

[Info] runtime: 00:03:04.167
[Info] vars: 7126, evals: 5738

[Info] |called|=73

Memory statistics: total=102516.30MB, max=342.38MB, minor=99998.52MB, major=26073.95MB, promoted=23556.17MB
    minor collections=49301  major collections=490 compactions=0

lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 

[Info] runtime: 00:03:15.286
[Info] vars: 9239, evals: 7554

[Info] |called|=15

Memory statistics: total=113792.80MB, max=2704.62MB, minor=109126.66MB, major=29418.45MB, promoted=24752.30MB
    minor collections=53663  major collections=506 compactions=0

[Info][Unsound] Unknown value in {&local_data_fv.vmm_regs.gprs} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3465:5-3465:71)
[Warning][Unknown] lval (& dest)->vmm_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3465:5-3465:71)
[Warning][Unknown] lval (& dest)->gprs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->vmm_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((((4 <= i && i <= 512) || i == 3) && (((((((dim0 == 4 || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512)) || (i == 2 && ((((((((dim0 == 2 || dim0 == 4) || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512))) || (i == 1 && ((((((((dim0 == 2 || dim0 == 4) || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512))) || ((((((((((((((((((0 == i && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && i == 0) && ((((((((dim0 == 2 || dim0 == 4) || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->gprs points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->vmm_regs points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->gprs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->vmm_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->gprs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->vmm_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((((4 <= i && i <= 512) || i == 3) && (((((((dim0 == 4 || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512)) || (i == 2 && ((((((((dim0 == 2 || dim0 == 4) || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512))) || (i == 1 && ((((((((dim0 == 2 || dim0 == 4) || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512))) || ((((((((((((((((((0 == i && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && i == 0) && ((((((((dim0 == 2 || dim0 == 4) || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->gprs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->vmm_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->gprs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->vmm_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((((4 <= i && i <= 512) || i == 3) && (((((((dim0 == 4 || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512)) || (i == 2 && ((((((((dim0 == 2 || dim0 == 4) || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512))) || (i == 1 && ((((((((dim0 == 2 || dim0 == 4) || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512))) || ((((((((((((((((((0 == i && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && i == 0) && ((((((((dim0 == 2 || dim0 == 4) || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->gprs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->vmm_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->gprs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->vmm_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((((4 <= i && i <= 512) || i == 3) && (((((((dim0 == 4 || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512)) || (i == 2 && ((((((((dim0 == 2 || dim0 == 4) || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512))) || (i == 1 && ((((((((dim0 == 2 || dim0 == 4) || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512))) || ((((((((((((((((((0 == i && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && i == 0) && ((((((((dim0 == 2 || dim0 == 4) || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->gprs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->vmm_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->gprs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->vmm_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((((4 <= i && i <= 512) || i == 3) && (((((((dim0 == 4 || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512)) || (i == 2 && ((((((((dim0 == 2 || dim0 == 4) || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512))) || (i == 1 && ((((((((dim0 == 2 || dim0 == 4) || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512))) || ((((((((((((((((((0 == i && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && i == 0) && ((((((((dim0 == 2 || dim0 == 4) || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->gprs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->vmm_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->gprs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->vmm_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((((4 <= i && i <= 512) || i == 3) && (((((((dim0 == 4 || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512)) || (i == 2 && ((((((((dim0 == 2 || dim0 == 4) || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512))) || (i == 1 && ((((((((dim0 == 2 || dim0 == 4) || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512))) || ((((((((((((((((((0 == i && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && i == 0) && ((((((((dim0 == 2 || dim0 == 4) || dim0 == 7) || dim0 == 8) || dim0 == 9) || dim0 == 15) || dim0 == 16) || dim0 == 32) || dim0 == 512)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->gprs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->vmm_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->vmm_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3466:1-3466:1)
[Info][Unsound] Unknown value in {&local_data_fv.td_regs.gprs} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3465:5-3465:71)
[Warning][Unknown] lval (& dest)->td_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3465:5-3465:71)
[Warning][Unknown] lval (& dest)->td_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->td_regs points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->td_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->td_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->td_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->td_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->td_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->td_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->td_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->td_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->td_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->td_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->td_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->td_regs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3466:1-3466:1)
[Warning][Unknown] lval (& dest)->lp_info points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->lp_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4247:6-4247:42)
[Warning][Unknown] lval (& dest)->lp_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4248:6-4248:44)
[Warning][Unknown] lval (& dest)->lp_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4249:6-4249:43)
[Warning][Unknown] lval (& dest)->lp_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4250:6-4250:45)
[Warning][Unknown] lval (& dest)->lp_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4251:1-4251:1)
[Warning][Unknown] lval (& dest)->ia32_debugctl_value points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_debugctl_value points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4253:6-4253:48)
[Warning][Unknown] lval (& dest)->ia32_debugctl_value points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4254:1-4254:1)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:44:170-44:173)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3971:12-3971:46)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3971:12-3971:46)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4259:6-4259:47)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4259:6-4259:47)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4260:6-4260:58)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4260:6-4260:58)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4261:5-4261:52)
[Warning][Unknown] lval (& dest)->tdr_pa points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:44:170-44:173)
[Warning][Unknown] lval (& dest)->tdr_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3971:12-3971:46)
[Warning][Unknown] lval (& dest)->tdr_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3971:12-3971:46)
[Warning][Unknown] lval (& dest)->tdr_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4256:6-4256:52)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4256:6-4256:52)
[Warning][Unknown] lval (& dest)->tdr_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4257:1-4257:1)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4257:1-4257:1)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4262:6-4262:49)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4262:6-4262:49)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4263:6-4263:60)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4263:6-4263:60)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4264:5-4264:71)
[Warning][Unknown] lval (& dest)->tdvpr_pamt_block points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:44:170-44:173)
[Warning][Unknown] lval (& dest)->tdvpr_pamt_block points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3971:12-3971:46)
[Warning][Unknown] lval (& dest)->tdvpr_pamt_block points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3971:12-3971:46)
[Warning][Unknown] lval (& dest)->tdvpr_pamt_block points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3974:6-3974:54)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3974:6-3974:54)
[Warning][Unknown] lval (& dest)->tdvpr_pamt_block points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3974:6-3974:54)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3974:6-3974:54)
[Warning][Unknown] lval (& dest)->tdvpr_pamt_block points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3975:6-3975:54)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3975:6-3975:54)
[Warning][Unknown] lval (& dest)->tdvpr_pamt_block points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3975:6-3975:54)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3975:6-3975:54)
[Warning][Unknown] lval (& dest)->tdvpr_pamt_block points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3976:6-3976:54)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3976:6-3976:54)
[Warning][Unknown] lval (& dest)->tdvpr_pamt_block points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3976:6-3976:54)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3976:6-3976:54)
[Warning][Unknown] lval (& dest)->tdvpr_pamt_block points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3977:1-3977:1)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3977:1-3977:1)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4265:5-4265:54)
[Warning][Unknown] lval (& dest)->tdvpr_pa points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:44:170-44:173)
[Warning][Unknown] lval (& dest)->tdvpr_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3971:12-3971:46)
[Warning][Unknown] lval (& dest)->tdvpr_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3971:12-3971:46)
[Warning][Unknown] lval (& dest)->tdvpr_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4256:6-4256:52)
[Warning][Unknown] lval (& dest)->tdvpr_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4257:1-4257:1)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4266:6-4266:48)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4266:6-4266:48)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4267:5-4267:59)
[Warning][Unknown] lval (& dest)->last_tdvpr_pa points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:44:170-44:173)
[Warning][Unknown] lval (& dest)->last_tdvpr_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3971:12-3971:46)
[Warning][Unknown] lval (& dest)->last_tdvpr_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3971:12-3971:46)
[Warning][Unknown] lval (& dest)->last_tdvpr_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4256:6-4256:52)
[Warning][Unknown] lval (& dest)->last_tdvpr_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4257:1-4257:1)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4268:5-4268:73)
[Warning][Unknown] lval (& dest)->attributes points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->attributes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4052:6-4052:48)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4052:6-4052:48)
[Warning][Unknown] lval (& dest)->attributes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4053:1-4053:1)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4053:1-4053:1)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4269:6-4269:49)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4270:6-4270:54)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4271:6-4271:68)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4272:6-4272:59)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4273:6-4273:53)
[Warning][Unknown] lval (& dest)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4274:1-4274:1)
[Warning][Unknown] lval (& dest)->single_step_def_state points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->single_step_def_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4276:6-4276:58)
[Warning][Unknown] lval (& dest)->single_step_def_state points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->single_step_def_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4277:6-4277:53)
[Warning][Unknown] lval (& dest)->single_step_def_state points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->single_step_def_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4278:6-4278:54)
[Warning][Unknown] lval (& dest)->single_step_def_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4279:6-4279:57)
[Warning][Unknown] lval (& dest)->single_step_def_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4280:6-4280:58)
[Warning][Unknown] lval (& dest)->single_step_def_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4281:6-4281:50)
[Warning][Unknown] lval (& dest)->single_step_def_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4282:6-4282:59)
[Warning][Unknown] lval (& dest)->single_step_def_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4283:6-4283:65)
[Warning][Unknown] lval (& dest)->single_step_def_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4284:1-4284:1)
[Warning][Unknown] lval (& dest)->vmm_non_extended_state points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->vmm_non_extended_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4286:6-4286:59)
[Warning][Unknown] lval (& dest)->vmm_non_extended_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4287:6-4287:60)
[Warning][Unknown] lval (& dest)->vmm_non_extended_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4288:6-4288:57)
[Warning][Unknown] lval (& dest)->vmm_non_extended_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4289:6-4289:58)
[Warning][Unknown] lval (& dest)->vmm_non_extended_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4290:1-4290:1)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4304:5-4304:85)
[Warning][Unknown] lval (& dest)->keyhole_array points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4292:14-4292:19)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4292:14-4292:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& local_data_fv.keyhole_state.keyhole_array))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == 0UL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 128) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.xbuf.xsave_header.xstate_bv == 0ULL) && global_data_fv.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )global_data_fv.xbuf.legacy_region.reserved_0 == 0) && global_data_fv.xbuf.legacy_region.mxcsr_mask == 0U) && global_data_fv.xbuf.legacy_region.mxcsr == 0U) && (int )global_data_fv.xbuf.legacy_region.ftw == 0) && (int )global_data_fv.xbuf.legacy_region.fsw == 0) && (int )global_data_fv.xbuf.legacy_region.fop == 0) && global_data_fv.xbuf.legacy_region.fip == 0ULL) && global_data_fv.xbuf.legacy_region.fdp == 0ULL) && (int )global_data_fv.xbuf.legacy_region.fcw == 0) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seamdb_index == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.private_hkid_min == 0U) && global_data_fv.private_hkid_max == 0U) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization 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global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && global_data_fv.pkg_config_bitmap == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_pkgs == 0U) && global_data_fv.num_of_lps == 0U) && global_data_fv.num_of_init_pkgs == 0U) && global_data_fv.num_of_init_lps == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_handoff_pages == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && (int )global_data_fv.no_downgrade == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )global_data_fv.module_hv == 0) && (int )global_data_fv.min_update_hv == 0) && global_data_fv.max_pa == 0ULL) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kot.lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.kot.lock.__annonCompField55.counter == 0) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.hkid_start_bit == 0U) && global_data_fv.hkid_mask == 0ULL) && (int )global_data_fv.hkid == 0) && (int )global_data_fv.global_state.sys_state == 0) && (int )global_data_fv.global_lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.global_lock.__annonCompField55.counter == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && local_data_fv.keyhole_state.total_ref_count == 0ULL) && (int )local_data_fv.keyhole_state.lru_tail == 0) && (int )local_data_fv.keyhole_state.lru_head == 0) && local_data_fv.host_ssp == 0ULL) && local_data_fv.host_rsp == 0ULL) && local_data_fv.host_gs_base == 0ULL) && (int )fv_exception_tracker_gp == 0) && 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4292:14-4292:19)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4293:10-4293:61)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4294:10-4294:57)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4295:10-4295:57)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4296:10-4296:63)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4297:10-4297:53)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4298:10-4298:59)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4299:10-4299:61)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4300:10-4300:61)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4292:14-4292:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& local_data_fv.keyhole_state.keyhole_array))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == 0UL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 128) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.xbuf.xsave_header.xstate_bv == 0ULL) && global_data_fv.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )global_data_fv.xbuf.legacy_region.reserved_0 == 0) && global_data_fv.xbuf.legacy_region.mxcsr_mask == 0U) && global_data_fv.xbuf.legacy_region.mxcsr == 0U) && (int )global_data_fv.xbuf.legacy_region.ftw == 0) && (int )global_data_fv.xbuf.legacy_region.fsw == 0) && (int )global_data_fv.xbuf.legacy_region.fop == 0) && global_data_fv.xbuf.legacy_region.fip == 0ULL) && global_data_fv.xbuf.legacy_region.fdp == 0ULL) && (int )global_data_fv.xbuf.legacy_region.fcw == 0) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seamdb_index == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.private_hkid_min == 0U) && global_data_fv.private_hkid_max == 0U) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && global_data_fv.pkg_config_bitmap == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_pkgs == 0U) && global_data_fv.num_of_lps == 0U) && global_data_fv.num_of_init_pkgs == 0U) && global_data_fv.num_of_init_lps == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_handoff_pages == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && (int )global_data_fv.no_downgrade == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )global_data_fv.module_hv == 0) && (int )global_data_fv.min_update_hv == 0) && global_data_fv.max_pa == 0ULL) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kot.lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.kot.lock.__annonCompField55.counter == 0) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.hkid_start_bit == 0U) && global_data_fv.hkid_mask == 0ULL) && (int )global_data_fv.hkid == 0) && (int )global_data_fv.global_state.sys_state == 0) && (int )global_data_fv.global_lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.global_lock.__annonCompField55.counter == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && local_data_fv.keyhole_state.total_ref_count == 0ULL) && (int )local_data_fv.keyhole_state.lru_tail == 0) && (int )local_data_fv.keyhole_state.lru_head == 0) && local_data_fv.host_ssp == 0ULL) && local_data_fv.host_rsp == 0ULL) && local_data_fv.host_gs_base == 0ULL) && (int )fv_exception_tracker_gp == 0) && 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4292:14-4292:19)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4293:10-4293:61)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4294:10-4294:57)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4295:10-4295:57)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4296:10-4296:63)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4297:10-4297:53)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4298:10-4298:59)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4299:10-4299:61)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4300:10-4300:61)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4292:14-4292:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& local_data_fv.keyhole_state.keyhole_array))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == 0UL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 128) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.xbuf.xsave_header.xstate_bv == 0ULL) && global_data_fv.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )global_data_fv.xbuf.legacy_region.reserved_0 == 0) && global_data_fv.xbuf.legacy_region.mxcsr_mask == 0U) && global_data_fv.xbuf.legacy_region.mxcsr == 0U) && (int )global_data_fv.xbuf.legacy_region.ftw == 0) && (int )global_data_fv.xbuf.legacy_region.fsw == 0) && (int )global_data_fv.xbuf.legacy_region.fop == 0) && global_data_fv.xbuf.legacy_region.fip == 0ULL) && global_data_fv.xbuf.legacy_region.fdp == 0ULL) && (int )global_data_fv.xbuf.legacy_region.fcw == 0) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seamdb_index == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.private_hkid_min == 0U) && global_data_fv.private_hkid_max == 0U) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization 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global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && global_data_fv.pkg_config_bitmap == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_pkgs == 0U) && global_data_fv.num_of_lps == 0U) && global_data_fv.num_of_init_pkgs == 0U) && global_data_fv.num_of_init_lps == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_handoff_pages == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && (int )global_data_fv.no_downgrade == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )global_data_fv.module_hv == 0) && (int )global_data_fv.min_update_hv == 0) && global_data_fv.max_pa == 0ULL) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kot.lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.kot.lock.__annonCompField55.counter == 0) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.hkid_start_bit == 0U) && global_data_fv.hkid_mask == 0ULL) && (int )global_data_fv.hkid == 0) && (int )global_data_fv.global_state.sys_state == 0) && (int )global_data_fv.global_lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.global_lock.__annonCompField55.counter == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && local_data_fv.keyhole_state.total_ref_count == 0ULL) && (int )local_data_fv.keyhole_state.lru_tail == 0) && (int )local_data_fv.keyhole_state.lru_head == 0) && local_data_fv.host_ssp == 0ULL) && local_data_fv.host_rsp == 0ULL) && local_data_fv.host_gs_base == 0ULL) && (int )fv_exception_tracker_gp == 0) && 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4292:14-4292:19)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4293:10-4293:61)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4294:10-4294:57)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4295:10-4295:57)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4296:10-4296:63)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4297:10-4297:53)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4298:10-4298:59)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4299:10-4299:61)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4300:10-4300:61)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4292:14-4292:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& local_data_fv.keyhole_state.keyhole_array))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == 0UL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 128) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.xbuf.xsave_header.xstate_bv == 0ULL) && global_data_fv.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )global_data_fv.xbuf.legacy_region.reserved_0 == 0) && global_data_fv.xbuf.legacy_region.mxcsr_mask == 0U) && global_data_fv.xbuf.legacy_region.mxcsr == 0U) && (int )global_data_fv.xbuf.legacy_region.ftw == 0) && (int )global_data_fv.xbuf.legacy_region.fsw == 0) && (int )global_data_fv.xbuf.legacy_region.fop == 0) && global_data_fv.xbuf.legacy_region.fip == 0ULL) && global_data_fv.xbuf.legacy_region.fdp == 0ULL) && (int )global_data_fv.xbuf.legacy_region.fcw == 0) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seamdb_index == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.private_hkid_min == 0U) && global_data_fv.private_hkid_max == 0U) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && global_data_fv.pkg_config_bitmap == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_pkgs == 0U) && global_data_fv.num_of_lps == 0U) && global_data_fv.num_of_init_pkgs == 0U) && global_data_fv.num_of_init_lps == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_handoff_pages == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && (int )global_data_fv.no_downgrade == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )global_data_fv.module_hv == 0) && (int )global_data_fv.min_update_hv == 0) && global_data_fv.max_pa == 0ULL) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kot.lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.kot.lock.__annonCompField55.counter == 0) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.hkid_start_bit == 0U) && global_data_fv.hkid_mask == 0ULL) && (int )global_data_fv.hkid == 0) && (int )global_data_fv.global_state.sys_state == 0) && (int )global_data_fv.global_lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.global_lock.__annonCompField55.counter == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && local_data_fv.keyhole_state.total_ref_count == 0ULL) && (int )local_data_fv.keyhole_state.lru_tail == 0) && (int )local_data_fv.keyhole_state.lru_head == 0) && local_data_fv.host_ssp == 0ULL) && local_data_fv.host_rsp == 0ULL) && local_data_fv.host_gs_base == 0ULL) && (int )fv_exception_tracker_gp == 0) && 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4292:14-4292:19)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4293:10-4293:61)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4294:10-4294:57)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4295:10-4295:57)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4296:10-4296:63)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4297:10-4297:53)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4298:10-4298:59)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4299:10-4299:61)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4300:10-4300:61)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4292:14-4292:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& local_data_fv.keyhole_state.keyhole_array))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == 0UL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 128) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.xbuf.xsave_header.xstate_bv == 0ULL) && global_data_fv.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )global_data_fv.xbuf.legacy_region.reserved_0 == 0) && global_data_fv.xbuf.legacy_region.mxcsr_mask == 0U) && global_data_fv.xbuf.legacy_region.mxcsr == 0U) && (int )global_data_fv.xbuf.legacy_region.ftw == 0) && (int )global_data_fv.xbuf.legacy_region.fsw == 0) && (int )global_data_fv.xbuf.legacy_region.fop == 0) && global_data_fv.xbuf.legacy_region.fip == 0ULL) && global_data_fv.xbuf.legacy_region.fdp == 0ULL) && (int )global_data_fv.xbuf.legacy_region.fcw == 0) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seamdb_index == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.private_hkid_min == 0U) && global_data_fv.private_hkid_max == 0U) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization 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global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && global_data_fv.pkg_config_bitmap == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_pkgs == 0U) && global_data_fv.num_of_lps == 0U) && global_data_fv.num_of_init_pkgs == 0U) && global_data_fv.num_of_init_lps == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_handoff_pages == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && (int )global_data_fv.no_downgrade == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )global_data_fv.module_hv == 0) && (int )global_data_fv.min_update_hv == 0) && global_data_fv.max_pa == 0ULL) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kot.lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.kot.lock.__annonCompField55.counter == 0) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.hkid_start_bit == 0U) && global_data_fv.hkid_mask == 0ULL) && (int )global_data_fv.hkid == 0) && (int )global_data_fv.global_state.sys_state == 0) && (int )global_data_fv.global_lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.global_lock.__annonCompField55.counter == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && local_data_fv.keyhole_state.total_ref_count == 0ULL) && (int )local_data_fv.keyhole_state.lru_tail == 0) && (int )local_data_fv.keyhole_state.lru_head == 0) && local_data_fv.host_ssp == 0ULL) && local_data_fv.host_rsp == 0ULL) && local_data_fv.host_gs_base == 0ULL) && (int )fv_exception_tracker_gp == 0) && 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4292:14-4292:19)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4293:10-4293:61)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4294:10-4294:57)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4295:10-4295:57)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4296:10-4296:63)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4297:10-4297:53)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4298:10-4298:59)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4299:10-4299:61)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4300:10-4300:61)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4292:14-4292:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& local_data_fv.keyhole_state.keyhole_array))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == 0UL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 128) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.xbuf.xsave_header.xstate_bv == 0ULL) && global_data_fv.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )global_data_fv.xbuf.legacy_region.reserved_0 == 0) && global_data_fv.xbuf.legacy_region.mxcsr_mask == 0U) && global_data_fv.xbuf.legacy_region.mxcsr == 0U) && (int )global_data_fv.xbuf.legacy_region.ftw == 0) && (int )global_data_fv.xbuf.legacy_region.fsw == 0) && (int )global_data_fv.xbuf.legacy_region.fop == 0) && global_data_fv.xbuf.legacy_region.fip == 0ULL) && global_data_fv.xbuf.legacy_region.fdp == 0ULL) && (int )global_data_fv.xbuf.legacy_region.fcw == 0) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seamdb_index == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.private_hkid_min == 0U) && global_data_fv.private_hkid_max == 0U) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && global_data_fv.pkg_config_bitmap == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_pkgs == 0U) && global_data_fv.num_of_lps == 0U) && global_data_fv.num_of_init_pkgs == 0U) && global_data_fv.num_of_init_lps == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_handoff_pages == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && (int )global_data_fv.no_downgrade == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )global_data_fv.module_hv == 0) && (int )global_data_fv.min_update_hv == 0) && global_data_fv.max_pa == 0ULL) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kot.lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.kot.lock.__annonCompField55.counter == 0) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.hkid_start_bit == 0U) && global_data_fv.hkid_mask == 0ULL) && (int )global_data_fv.hkid == 0) && (int )global_data_fv.global_state.sys_state == 0) && (int )global_data_fv.global_lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.global_lock.__annonCompField55.counter == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && local_data_fv.keyhole_state.total_ref_count == 0ULL) && (int )local_data_fv.keyhole_state.lru_tail == 0) && (int )local_data_fv.keyhole_state.lru_head == 0) && local_data_fv.host_ssp == 0ULL) && local_data_fv.host_rsp == 0ULL) && local_data_fv.host_gs_base == 0ULL) && (int )fv_exception_tracker_gp == 0) && 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4292:14-4292:19)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4302:1-4302:1)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4305:5-4305:74)
[Warning][Unknown] lval (& dest)->hash_table points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4109:14-4109:19)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4109:14-4109:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& local_data_fv.keyhole_state.hash_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == 0UL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 128) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.xbuf.xsave_header.xstate_bv == 0ULL) && global_data_fv.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )global_data_fv.xbuf.legacy_region.reserved_0 == 0) && global_data_fv.xbuf.legacy_region.mxcsr_mask == 0U) && global_data_fv.xbuf.legacy_region.mxcsr == 0U) && (int )global_data_fv.xbuf.legacy_region.ftw == 0) && (int )global_data_fv.xbuf.legacy_region.fsw == 0) && (int )global_data_fv.xbuf.legacy_region.fop == 0) && global_data_fv.xbuf.legacy_region.fip == 0ULL) && global_data_fv.xbuf.legacy_region.fdp == 0ULL) && (int )global_data_fv.xbuf.legacy_region.fcw == 0) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seamdb_index == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.private_hkid_min == 0U) && global_data_fv.private_hkid_max == 0U) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization 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global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && global_data_fv.pkg_config_bitmap == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_pkgs == 0U) && global_data_fv.num_of_lps == 0U) && global_data_fv.num_of_init_pkgs == 0U) && global_data_fv.num_of_init_lps == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_handoff_pages == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && (int )global_data_fv.no_downgrade == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )global_data_fv.module_hv == 0) && (int )global_data_fv.min_update_hv == 0) && global_data_fv.max_pa == 0ULL) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kot.lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.kot.lock.__annonCompField55.counter == 0) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.hkid_start_bit == 0U) && global_data_fv.hkid_mask == 0ULL) && (int )global_data_fv.hkid == 0) && (int )global_data_fv.global_state.sys_state == 0) && (int )global_data_fv.global_lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.global_lock.__annonCompField55.counter == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && local_data_fv.keyhole_state.total_ref_count == 0ULL) && (int )local_data_fv.keyhole_state.lru_tail == 0) && (int )local_data_fv.keyhole_state.lru_head == 0) && local_data_fv.host_ssp == 0ULL) && local_data_fv.host_rsp == 0ULL) && local_data_fv.host_gs_base == 0ULL) && (int )fv_exception_tracker_gp == 0) && 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4109:14-4109:19)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4110:10-4110:48)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4109:14-4109:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& local_data_fv.keyhole_state.hash_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == 0UL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 128) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.xbuf.xsave_header.xstate_bv == 0ULL) && global_data_fv.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )global_data_fv.xbuf.legacy_region.reserved_0 == 0) && global_data_fv.xbuf.legacy_region.mxcsr_mask == 0U) && global_data_fv.xbuf.legacy_region.mxcsr == 0U) && (int )global_data_fv.xbuf.legacy_region.ftw == 0) && (int )global_data_fv.xbuf.legacy_region.fsw == 0) && (int )global_data_fv.xbuf.legacy_region.fop == 0) && global_data_fv.xbuf.legacy_region.fip == 0ULL) && global_data_fv.xbuf.legacy_region.fdp == 0ULL) && (int )global_data_fv.xbuf.legacy_region.fcw == 0) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seamdb_index == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.private_hkid_min == 0U) && global_data_fv.private_hkid_max == 0U) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && global_data_fv.pkg_config_bitmap == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_pkgs == 0U) && global_data_fv.num_of_lps == 0U) && global_data_fv.num_of_init_pkgs == 0U) && global_data_fv.num_of_init_lps == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_handoff_pages == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && (int )global_data_fv.no_downgrade == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )global_data_fv.module_hv == 0) && (int )global_data_fv.min_update_hv == 0) && global_data_fv.max_pa == 0ULL) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kot.lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.kot.lock.__annonCompField55.counter == 0) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.hkid_start_bit == 0U) && global_data_fv.hkid_mask == 0ULL) && (int )global_data_fv.hkid == 0) && (int )global_data_fv.global_state.sys_state == 0) && (int )global_data_fv.global_lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.global_lock.__annonCompField55.counter == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && local_data_fv.keyhole_state.total_ref_count == 0ULL) && (int )local_data_fv.keyhole_state.lru_tail == 0) && (int )local_data_fv.keyhole_state.lru_head == 0) && local_data_fv.host_ssp == 0ULL) && local_data_fv.host_rsp == 0ULL) && local_data_fv.host_gs_base == 0ULL) && (int )fv_exception_tracker_gp == 0) && 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4109:14-4109:19)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4110:10-4110:48)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4109:14-4109:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& local_data_fv.keyhole_state.hash_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == 0UL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 128) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.xbuf.xsave_header.xstate_bv == 0ULL) && global_data_fv.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )global_data_fv.xbuf.legacy_region.reserved_0 == 0) && global_data_fv.xbuf.legacy_region.mxcsr_mask == 0U) && global_data_fv.xbuf.legacy_region.mxcsr == 0U) && (int )global_data_fv.xbuf.legacy_region.ftw == 0) && (int )global_data_fv.xbuf.legacy_region.fsw == 0) && (int )global_data_fv.xbuf.legacy_region.fop == 0) && global_data_fv.xbuf.legacy_region.fip == 0ULL) && global_data_fv.xbuf.legacy_region.fdp == 0ULL) && (int )global_data_fv.xbuf.legacy_region.fcw == 0) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seamdb_index == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.private_hkid_min == 0U) && global_data_fv.private_hkid_max == 0U) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && 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== 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && global_data_fv.pkg_config_bitmap == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_pkgs == 0U) && global_data_fv.num_of_lps == 0U) && global_data_fv.num_of_init_pkgs == 0U) && global_data_fv.num_of_init_lps == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_handoff_pages == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && (int )global_data_fv.no_downgrade == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )global_data_fv.module_hv == 0) && (int )global_data_fv.min_update_hv == 0) && global_data_fv.max_pa == 0ULL) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kot.lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.kot.lock.__annonCompField55.counter == 0) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.hkid_start_bit == 0U) && global_data_fv.hkid_mask == 0ULL) && (int )global_data_fv.hkid == 0) && (int )global_data_fv.global_state.sys_state == 0) && (int )global_data_fv.global_lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.global_lock.__annonCompField55.counter == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && local_data_fv.keyhole_state.total_ref_count == 0ULL) && (int )local_data_fv.keyhole_state.lru_tail == 0) && (int )local_data_fv.keyhole_state.lru_head == 0) && local_data_fv.host_ssp == 0ULL) && local_data_fv.host_rsp == 0ULL) && local_data_fv.host_gs_base == 0ULL) && (int )fv_exception_tracker_gp == 0) && 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4109:14-4109:19)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4110:10-4110:48)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4109:14-4109:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& local_data_fv.keyhole_state.hash_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == 0UL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 128) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.xbuf.xsave_header.xstate_bv == 0ULL) && global_data_fv.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )global_data_fv.xbuf.legacy_region.reserved_0 == 0) && global_data_fv.xbuf.legacy_region.mxcsr_mask == 0U) && global_data_fv.xbuf.legacy_region.mxcsr == 0U) && (int )global_data_fv.xbuf.legacy_region.ftw == 0) && (int )global_data_fv.xbuf.legacy_region.fsw == 0) && (int )global_data_fv.xbuf.legacy_region.fop == 0) && global_data_fv.xbuf.legacy_region.fip == 0ULL) && global_data_fv.xbuf.legacy_region.fdp == 0ULL) && (int )global_data_fv.xbuf.legacy_region.fcw == 0) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seamdb_index == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.private_hkid_min == 0U) && global_data_fv.private_hkid_max == 0U) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && global_data_fv.pkg_config_bitmap == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_pkgs == 0U) && global_data_fv.num_of_lps == 0U) && global_data_fv.num_of_init_pkgs == 0U) && global_data_fv.num_of_init_lps == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_handoff_pages == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && (int )global_data_fv.no_downgrade == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )global_data_fv.module_hv == 0) && (int )global_data_fv.min_update_hv == 0) && global_data_fv.max_pa == 0ULL) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kot.lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.kot.lock.__annonCompField55.counter == 0) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.hkid_start_bit == 0U) && global_data_fv.hkid_mask == 0ULL) && (int )global_data_fv.hkid == 0) && (int )global_data_fv.global_state.sys_state == 0) && (int )global_data_fv.global_lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.global_lock.__annonCompField55.counter == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && local_data_fv.keyhole_state.total_ref_count == 0ULL) && (int )local_data_fv.keyhole_state.lru_tail == 0) && (int )local_data_fv.keyhole_state.lru_head == 0) && local_data_fv.host_ssp == 0ULL) && local_data_fv.host_rsp == 0ULL) && local_data_fv.host_gs_base == 0ULL) && (int )fv_exception_tracker_gp == 0) && 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4109:14-4109:19)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4110:10-4110:48)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4109:14-4109:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& local_data_fv.keyhole_state.hash_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == 0UL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 128) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.xbuf.xsave_header.xstate_bv == 0ULL) && global_data_fv.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )global_data_fv.xbuf.legacy_region.reserved_0 == 0) && global_data_fv.xbuf.legacy_region.mxcsr_mask == 0U) && global_data_fv.xbuf.legacy_region.mxcsr == 0U) && (int )global_data_fv.xbuf.legacy_region.ftw == 0) && (int )global_data_fv.xbuf.legacy_region.fsw == 0) && (int )global_data_fv.xbuf.legacy_region.fop == 0) && global_data_fv.xbuf.legacy_region.fip == 0ULL) && global_data_fv.xbuf.legacy_region.fdp == 0ULL) && (int )global_data_fv.xbuf.legacy_region.fcw == 0) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seamdb_index == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.private_hkid_min == 0U) && global_data_fv.private_hkid_max == 0U) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && global_data_fv.pkg_config_bitmap == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_pkgs == 0U) && global_data_fv.num_of_lps == 0U) && global_data_fv.num_of_init_pkgs == 0U) && global_data_fv.num_of_init_lps == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_handoff_pages == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && (int )global_data_fv.no_downgrade == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )global_data_fv.module_hv == 0) && (int )global_data_fv.min_update_hv == 0) && global_data_fv.max_pa == 0ULL) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kot.lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.kot.lock.__annonCompField55.counter == 0) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.hkid_start_bit == 0U) && global_data_fv.hkid_mask == 0ULL) && (int )global_data_fv.hkid == 0) && (int )global_data_fv.global_state.sys_state == 0) && (int )global_data_fv.global_lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.global_lock.__annonCompField55.counter == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && local_data_fv.keyhole_state.total_ref_count == 0ULL) && (int )local_data_fv.keyhole_state.lru_tail == 0) && (int )local_data_fv.keyhole_state.lru_head == 0) && local_data_fv.host_ssp == 0ULL) && local_data_fv.host_rsp == 0ULL) && local_data_fv.host_gs_base == 0ULL) && (int )fv_exception_tracker_gp == 0) && 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4109:14-4109:19)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4110:10-4110:48)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4109:14-4109:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& local_data_fv.keyhole_state.hash_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == 0UL) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == 0UL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 128) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.xbuf.xsave_header.xstate_bv == 0ULL) && global_data_fv.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )global_data_fv.xbuf.legacy_region.reserved_0 == 0) && global_data_fv.xbuf.legacy_region.mxcsr_mask == 0U) && global_data_fv.xbuf.legacy_region.mxcsr == 0U) && (int )global_data_fv.xbuf.legacy_region.ftw == 0) && (int )global_data_fv.xbuf.legacy_region.fsw == 0) && (int )global_data_fv.xbuf.legacy_region.fop == 0) && global_data_fv.xbuf.legacy_region.fip == 0ULL) && global_data_fv.xbuf.legacy_region.fdp == 0ULL) && (int )global_data_fv.xbuf.legacy_region.fcw == 0) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seamdb_index == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.private_hkid_min == 0U) && global_data_fv.private_hkid_max == 0U) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && global_data_fv.pkg_config_bitmap == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_pkgs == 0U) && global_data_fv.num_of_lps == 0U) && global_data_fv.num_of_init_pkgs == 0U) && global_data_fv.num_of_init_lps == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_handoff_pages == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && (int )global_data_fv.no_downgrade == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )global_data_fv.module_hv == 0) && (int )global_data_fv.min_update_hv == 0) && global_data_fv.max_pa == 0ULL) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kot.lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.kot.lock.__annonCompField55.counter == 0) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.hkid_start_bit == 0U) && global_data_fv.hkid_mask == 0ULL) && (int )global_data_fv.hkid == 0) && (int )global_data_fv.global_state.sys_state == 0) && (int )global_data_fv.global_lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.global_lock.__annonCompField55.counter == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && local_data_fv.keyhole_state.total_ref_count == 0ULL) && (int )local_data_fv.keyhole_state.lru_tail == 0) && (int )local_data_fv.keyhole_state.lru_head == 0) && local_data_fv.host_ssp == 0ULL) && local_data_fv.host_rsp == 0ULL) && local_data_fv.host_gs_base == 0ULL) && (int )fv_exception_tracker_gp == 0) && 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4109:14-4109:19)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4112:1-4112:1)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4306:6-4306:50)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4307:6-4307:50)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4308:6-4308:60)
[Warning][Unknown] lval (& dest)->keyhole_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4309:1-4309:1)
[Info][Unsound] Unknown value in {&global_data_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4401:5-4401:61)
[Info][Unsound] Unknown value in {&global_data_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4367:5-4367:55)
[Info][Unsound] Unknown value in {&global_data_fv.xbuf} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3893:5-3893:71)
[Info][Unsound] Unknown value in {&global_data_fv.xbuf.legacy_region} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3685:5-3685:70)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3685:5-3685:70)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3639:6-3639:45)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3639:6-3639:45)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3640:6-3640:45)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3640:6-3640:45)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3641:6-3641:44)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3641:6-3641:44)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3642:6-3642:51)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3642:6-3642:51)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3643:6-3643:45)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3643:6-3643:45)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3644:6-3644:48)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3644:6-3644:48)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3645:6-3645:48)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3645:6-3645:48)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3646:6-3646:45)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3646:6-3646:45)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3647:6-3647:50)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3647:6-3647:50)
[Info][Unsound] Unknown value in {&global_data_fv.xbuf.legacy_region.st_mm} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3648:5-3648:62)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3648:5-3648:62)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3648:5-3648:62)
[Warning][Unknown] lval (& dest)->st_mm points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((global_data_fv.attributes_fixed0 == 0ULL && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.crystal_clock_frequency == 0ULL) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.global_lock.__annonCompField55.counter == 0) && (int )global_data_fv.global_lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.global_state.sys_state == 0) && (int )global_data_fv.hkid == 0) && global_data_fv.hkid_mask == 0ULL) && global_data_fv.hkid_start_bit == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && (int )global_data_fv.kot.lock.__annonCompField55.counter == 0) && (int )global_data_fv.kot.lock.__annonCompField55.exclusive == 0) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && (int )global_data_fv.la57_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.lass_supported == 0) && global_data_fv.max_lbr_depth == 0U) && global_data_fv.max_pa == 0ULL) && (int )global_data_fv.min_update_hv == 0) && (int )global_data_fv.module_hv == 0) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_tsc_frequency == 0ULL) && (int )global_data_fv.no_downgrade == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && (int )global_data_fv.num_handoff_pages == 0) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && global_data_fv.num_of_init_lps == 0U) && global_data_fv.num_of_init_pkgs == 0U) && global_data_fv.num_of_lps == 0U) && global_data_fv.num_of_pkgs == 0U) && global_data_fv.num_of_tdmr_entries == 0U) && (int )global_data_fv.num_rdseed_pauses == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && global_data_fv.pkg_config_bitmap == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.private_hkid_max == 0U) && global_data_fv.private_hkid_min == 0U) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seamdb_index == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seamrr_size == 0ULL) && (int )global_data_fv.seamverifyreport_available == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.x2apic_core_id_mask == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.xbuf.xsave_header.xcomp_bv == 0ULL) && global_data_fv.xbuf.xsave_header.xstate_bv == 0ULL) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.xfd_faulting_mask == 0U) && (int )global_data_fv.xfd_supported == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && (int )sysinfo_table_fv.min_update_hv == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.num_handoff_pages == 0) && sysinfo_table_fv.num_stack_pages == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.stack_rgn_size == 0ULL) && (int )tdr_fv.key_management_fields.hkid == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.mig_count == 0ULL) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.curr_vm == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && tdvps_fv.management.last_exit_tsc == 0ULL) && tdvps_fv.management.last_seamdb_index == 0ULL) && (int )tdvps_fv.management.last_td_exit == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.reserved_0 == 0) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && (int )tdvps_fv.management.state == 0) && tdvps_fv.management.vcpu_epoch == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.exit_qualification == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.valid == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (dim0 == 8 || dim0 == 16)) && ((unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((4 <= i && i <= 16) || i == 3)) || ((((i == 2 && ((dim0 == 2 || dim0 == 8) || dim0 == 16)) && (((unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.guest_state.iwk_enckey)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm))) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U))) || ((((i == 1 && ((dim0 == 2 || dim0 == 8) || dim0 == 16)) && (((unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.guest_state.iwk_enckey)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm))) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U))) || (((((0 == i && i == 0) && ((dim0 == 2 || dim0 == 8) || dim0 == 16)) && (((unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.guest_state.iwk_enckey)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm))) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U))) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Info][Unsound] Unknown value in {&global_data_fv.xbuf.legacy_region.st_mm[def_exc:Unknown int([0,31]); intervals:[0,15]; enums:not {} ([0,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (*(& dest))[i].bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((((4 <= i && i <= 12288) || i == 3) && ((((((((((((((((((((((((((((((((((dim0 == 4 || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288)) || (i == 2 && (((((((((((((((((((((((((((((((((((dim0 == 2 || dim0 == 4) || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288))) || (i == 1 && ((((((((((((((((((((((((((((((((((((dim0 == 1 || dim0 == 2) || dim0 == 4) || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288))) || ((0 == i && i == 0) && ((((((((((((((((((((((((((((((((((((dim0 == 1 || dim0 == 2) || dim0 == 4) || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].bytes points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (*(& dest))[i].bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((((4 <= i && i <= 12288) || i == 3) && ((((((((((((((((((((((((((((((((((dim0 == 4 || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288)) || (i == 2 && (((((((((((((((((((((((((((((((((((dim0 == 2 || dim0 == 4) || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288))) || (i == 1 && ((((((((((((((((((((((((((((((((((((dim0 == 1 || dim0 == 2) || dim0 == 4) || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288))) || ((0 == i && i == 0) && ((((((((((((((((((((((((((((((((((((dim0 == 1 || dim0 == 2) || dim0 == 4) || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((((4 <= i && i <= 12288) || i == 3) && ((((((((((((((((((((((((((((((((((dim0 == 4 || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288)) || (i == 2 && (((((((((((((((((((((((((((((((((((dim0 == 2 || dim0 == 4) || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288))) || (i == 1 && ((((((((((((((((((((((((((((((((((((dim0 == 1 || dim0 == 2) || dim0 == 4) || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288))) || ((0 == i && i == 0) && ((((((((((((((((((((((((((((((((((((dim0 == 1 || dim0 == 2) || dim0 == 4) || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((((4 <= i && i <= 12288) || i == 3) && ((((((((((((((((((((((((((((((((((dim0 == 4 || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288)) || (i == 2 && (((((((((((((((((((((((((((((((((((dim0 == 2 || dim0 == 4) || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288))) || (i == 1 && ((((((((((((((((((((((((((((((((((((dim0 == 1 || dim0 == 2) || dim0 == 4) || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288))) || ((0 == i && i == 0) && ((((((((((((((((((((((((((((((((((((dim0 == 1 || dim0 == 2) || dim0 == 4) || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((((4 <= i && i <= 12288) || i == 3) && ((((((((((((((((((((((((((((((((((dim0 == 4 || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288)) || (i == 2 && (((((((((((((((((((((((((((((((((((dim0 == 2 || dim0 == 4) || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288))) || (i == 1 && ((((((((((((((((((((((((((((((((((((dim0 == 1 || dim0 == 2) || dim0 == 4) || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288))) || ((0 == i && i == 0) && ((((((((((((((((((((((((((((((((((((dim0 == 1 || dim0 == 2) || dim0 == 4) || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((((4 <= i && i <= 12288) || i == 3) && ((((((((((((((((((((((((((((((((((dim0 == 4 || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288)) || (i == 2 && (((((((((((((((((((((((((((((((((((dim0 == 2 || dim0 == 4) || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288))) || (i == 1 && ((((((((((((((((((((((((((((((((((((dim0 == 1 || dim0 == 2) || dim0 == 4) || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288))) || ((0 == i && i == 0) && ((((((((((((((((((((((((((((((((((((dim0 == 1 || dim0 == 2) || dim0 == 4) || dim0 == 5) || dim0 == 6) || dim0 == 7) || dim0 == 8) || dim0 == 12) || dim0 == 16) || dim0 == 20) || dim0 == 24) || dim0 == 32) || dim0 == 36) || dim0 == 40) || dim0 == 45) || dim0 == 46) || dim0 == 48) || dim0 == 64) || dim0 == 72) || dim0 == 80) || dim0 == 84) || dim0 == 88) || dim0 == 96) || dim0 == 110) || dim0 == 128) || dim0 == 158) || dim0 == 256) || dim0 == 608) || dim0 == 752) || dim0 == 848) || dim0 == 1280) || dim0 == 1408) || dim0 == 1936) || dim0 == 2048) || dim0 == 3712) || dim0 == 4096) || dim0 == 12288)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((global_data_fv.attributes_fixed0 == 0ULL && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.crystal_clock_frequency == 0ULL) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.global_lock.__annonCompField55.counter == 0) && (int )global_data_fv.global_lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.global_state.sys_state == 0) && (int )global_data_fv.hkid == 0) && global_data_fv.hkid_mask == 0ULL) && global_data_fv.hkid_start_bit == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && (int )global_data_fv.kot.lock.__annonCompField55.counter == 0) && (int )global_data_fv.kot.lock.__annonCompField55.exclusive == 0) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && (int )global_data_fv.la57_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.lass_supported == 0) && global_data_fv.max_lbr_depth == 0U) && global_data_fv.max_pa == 0ULL) && (int )global_data_fv.min_update_hv == 0) && (int )global_data_fv.module_hv == 0) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_tsc_frequency == 0ULL) && (int )global_data_fv.no_downgrade == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && (int )global_data_fv.num_handoff_pages == 0) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && global_data_fv.num_of_init_lps == 0U) && global_data_fv.num_of_init_pkgs == 0U) && global_data_fv.num_of_lps == 0U) && global_data_fv.num_of_pkgs == 0U) && global_data_fv.num_of_tdmr_entries == 0U) && (int )global_data_fv.num_rdseed_pauses == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && global_data_fv.pkg_config_bitmap == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.private_hkid_max == 0U) && global_data_fv.private_hkid_min == 0U) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seamdb_index == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seamrr_size == 0ULL) && (int )global_data_fv.seamverifyreport_available == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.x2apic_core_id_mask == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.xbuf.xsave_header.xcomp_bv == 0ULL) && global_data_fv.xbuf.xsave_header.xstate_bv == 0ULL) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.xfd_faulting_mask == 0U) && (int )global_data_fv.xfd_supported == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && (int )sysinfo_table_fv.min_update_hv == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.num_handoff_pages == 0) && sysinfo_table_fv.num_stack_pages == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.stack_rgn_size == 0ULL) && (int )tdr_fv.key_management_fields.hkid == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.mig_count == 0ULL) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.curr_vm == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && tdvps_fv.management.last_exit_tsc == 0ULL) && tdvps_fv.management.last_seamdb_index == 0ULL) && (int )tdvps_fv.management.last_td_exit == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.reserved_0 == 0) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && (int )tdvps_fv.management.state == 0) && tdvps_fv.management.vcpu_epoch == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.exit_qualification == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.valid == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (dim0 == 8 || dim0 == 16)) && ((unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((4 <= i && i <= 16) || i == 3)) || ((((i == 2 && ((dim0 == 2 || dim0 == 8) || dim0 == 16)) && (((unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.guest_state.iwk_enckey)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm))) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U))) || ((((i == 1 && ((dim0 == 2 || dim0 == 8) || dim0 == 16)) && (((unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.guest_state.iwk_enckey)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm))) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U))) || (((((0 == i && i == 0) && ((dim0 == 2 || dim0 == 8) || dim0 == 16)) && (((unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.guest_state.iwk_enckey)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm))) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U))) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Info][Unsound] Unknown value in {&global_data_fv.xbuf.legacy_region.st_mm[def_exc:Unknown int([-31,31]); intervals:[0,15]; enums:not {} ([-31,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((global_data_fv.attributes_fixed0 == 0ULL && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.crystal_clock_frequency == 0ULL) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.global_lock.__annonCompField55.counter == 0) && (int )global_data_fv.global_lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.global_state.sys_state == 0) && (int )global_data_fv.hkid == 0) && global_data_fv.hkid_mask == 0ULL) && global_data_fv.hkid_start_bit == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && (int )global_data_fv.kot.lock.__annonCompField55.counter == 0) && (int )global_data_fv.kot.lock.__annonCompField55.exclusive == 0) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && (int )global_data_fv.la57_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.lass_supported == 0) && global_data_fv.max_lbr_depth == 0U) && global_data_fv.max_pa == 0ULL) && (int )global_data_fv.min_update_hv == 0) && (int )global_data_fv.module_hv == 0) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_tsc_frequency == 0ULL) && (int )global_data_fv.no_downgrade == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && (int )global_data_fv.num_handoff_pages == 0) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && global_data_fv.num_of_init_lps == 0U) && global_data_fv.num_of_init_pkgs == 0U) && global_data_fv.num_of_lps == 0U) && global_data_fv.num_of_pkgs == 0U) && global_data_fv.num_of_tdmr_entries == 0U) && (int )global_data_fv.num_rdseed_pauses == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && global_data_fv.pkg_config_bitmap == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.private_hkid_max == 0U) && global_data_fv.private_hkid_min == 0U) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seamdb_index == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seamrr_size == 0ULL) && (int )global_data_fv.seamverifyreport_available == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.x2apic_core_id_mask == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.xbuf.xsave_header.xcomp_bv == 0ULL) && global_data_fv.xbuf.xsave_header.xstate_bv == 0ULL) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.xfd_faulting_mask == 0U) && (int )global_data_fv.xfd_supported == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && (int )sysinfo_table_fv.min_update_hv == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.num_handoff_pages == 0) && sysinfo_table_fv.num_stack_pages == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.stack_rgn_size == 0ULL) && (int )tdr_fv.key_management_fields.hkid == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.mig_count == 0ULL) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.curr_vm == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && tdvps_fv.management.last_exit_tsc == 0ULL) && tdvps_fv.management.last_seamdb_index == 0ULL) && (int )tdvps_fv.management.last_td_exit == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.reserved_0 == 0) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && (int )tdvps_fv.management.state == 0) && tdvps_fv.management.vcpu_epoch == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.exit_qualification == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.valid == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (dim0 == 8 || dim0 == 16)) && ((unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((4 <= i && i <= 16) || i == 3)) || ((((i == 2 && ((dim0 == 2 || dim0 == 8) || dim0 == 16)) && (((unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.guest_state.iwk_enckey)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm))) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U))) || ((((i == 1 && ((dim0 == 2 || dim0 == 8) || dim0 == 16)) && (((unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.guest_state.iwk_enckey)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm))) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U))) || (((((0 == i && i == 0) && ((dim0 == 2 || dim0 == 8) || dim0 == 16)) && (((unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.guest_state.iwk_enckey)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm))) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U))) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Info][Unsound] Unknown value in {&global_data_fv.xbuf.legacy_region.st_mm[def_exc:Unknown int([-31,31]); intervals:[0,15]; enums:not {} ([-31,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((global_data_fv.attributes_fixed0 == 0ULL && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.crystal_clock_frequency == 0ULL) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.global_lock.__annonCompField55.counter == 0) && (int )global_data_fv.global_lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.global_state.sys_state == 0) && (int )global_data_fv.hkid == 0) && global_data_fv.hkid_mask == 0ULL) && global_data_fv.hkid_start_bit == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && (int )global_data_fv.kot.lock.__annonCompField55.counter == 0) && (int )global_data_fv.kot.lock.__annonCompField55.exclusive == 0) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && (int )global_data_fv.la57_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.lass_supported == 0) && global_data_fv.max_lbr_depth == 0U) && global_data_fv.max_pa == 0ULL) && (int )global_data_fv.min_update_hv == 0) && (int )global_data_fv.module_hv == 0) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_tsc_frequency == 0ULL) && (int )global_data_fv.no_downgrade == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && (int )global_data_fv.num_handoff_pages == 0) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && global_data_fv.num_of_init_lps == 0U) && global_data_fv.num_of_init_pkgs == 0U) && global_data_fv.num_of_lps == 0U) && global_data_fv.num_of_pkgs == 0U) && global_data_fv.num_of_tdmr_entries == 0U) && (int )global_data_fv.num_rdseed_pauses == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && global_data_fv.pkg_config_bitmap == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.private_hkid_max == 0U) && global_data_fv.private_hkid_min == 0U) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seamdb_index == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seamrr_size == 0ULL) && (int )global_data_fv.seamverifyreport_available == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.x2apic_core_id_mask == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.xbuf.xsave_header.xcomp_bv == 0ULL) && global_data_fv.xbuf.xsave_header.xstate_bv == 0ULL) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.xfd_faulting_mask == 0U) && (int )global_data_fv.xfd_supported == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && (int )sysinfo_table_fv.min_update_hv == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.num_handoff_pages == 0) && sysinfo_table_fv.num_stack_pages == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.stack_rgn_size == 0ULL) && (int )tdr_fv.key_management_fields.hkid == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.mig_count == 0ULL) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.curr_vm == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && tdvps_fv.management.last_exit_tsc == 0ULL) && tdvps_fv.management.last_seamdb_index == 0ULL) && (int )tdvps_fv.management.last_td_exit == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.reserved_0 == 0) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && (int )tdvps_fv.management.state == 0) && tdvps_fv.management.vcpu_epoch == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.exit_qualification == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.valid == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (dim0 == 8 || dim0 == 16)) && ((unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((4 <= i && i <= 16) || i == 3)) || ((((i == 2 && ((dim0 == 2 || dim0 == 8) || dim0 == 16)) && (((unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.guest_state.iwk_enckey)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm))) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U))) || ((((i == 1 && ((dim0 == 2 || dim0 == 8) || dim0 == 16)) && (((unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.guest_state.iwk_enckey)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm))) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U))) || (((((0 == i && i == 0) && ((dim0 == 2 || dim0 == 8) || dim0 == 16)) && (((unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.guest_state.iwk_enckey)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm))) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U))) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Info][Unsound] Unknown value in {&global_data_fv.xbuf.legacy_region.st_mm[def_exc:Unknown int([-31,31]); intervals:[0,15]; enums:not {} ([-31,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((global_data_fv.attributes_fixed0 == 0ULL && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.crystal_clock_frequency == 0ULL) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.global_lock.__annonCompField55.counter == 0) && (int )global_data_fv.global_lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.global_state.sys_state == 0) && (int )global_data_fv.hkid == 0) && global_data_fv.hkid_mask == 0ULL) && global_data_fv.hkid_start_bit == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && (int )global_data_fv.kot.lock.__annonCompField55.counter == 0) && (int )global_data_fv.kot.lock.__annonCompField55.exclusive == 0) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && (int )global_data_fv.la57_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.lass_supported == 0) && global_data_fv.max_lbr_depth == 0U) && global_data_fv.max_pa == 0ULL) && (int )global_data_fv.min_update_hv == 0) && (int )global_data_fv.module_hv == 0) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_tsc_frequency == 0ULL) && (int )global_data_fv.no_downgrade == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && (int )global_data_fv.num_handoff_pages == 0) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && global_data_fv.num_of_init_lps == 0U) && global_data_fv.num_of_init_pkgs == 0U) && global_data_fv.num_of_lps == 0U) && global_data_fv.num_of_pkgs == 0U) && global_data_fv.num_of_tdmr_entries == 0U) && (int )global_data_fv.num_rdseed_pauses == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && global_data_fv.pkg_config_bitmap == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.private_hkid_max == 0U) && global_data_fv.private_hkid_min == 0U) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seamdb_index == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seamrr_size == 0ULL) && (int )global_data_fv.seamverifyreport_available == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.x2apic_core_id_mask == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.xbuf.xsave_header.xcomp_bv == 0ULL) && global_data_fv.xbuf.xsave_header.xstate_bv == 0ULL) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.xfd_faulting_mask == 0U) && (int )global_data_fv.xfd_supported == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && (int )sysinfo_table_fv.min_update_hv == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.num_handoff_pages == 0) && sysinfo_table_fv.num_stack_pages == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.stack_rgn_size == 0ULL) && (int )tdr_fv.key_management_fields.hkid == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.mig_count == 0ULL) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.curr_vm == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && tdvps_fv.management.last_exit_tsc == 0ULL) && tdvps_fv.management.last_seamdb_index == 0ULL) && (int )tdvps_fv.management.last_td_exit == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.reserved_0 == 0) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && (int )tdvps_fv.management.state == 0) && tdvps_fv.management.vcpu_epoch == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.exit_qualification == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.valid == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (dim0 == 8 || dim0 == 16)) && ((unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((4 <= i && i <= 16) || i == 3)) || ((((i == 2 && ((dim0 == 2 || dim0 == 8) || dim0 == 16)) && (((unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.guest_state.iwk_enckey)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm))) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U))) || ((((i == 1 && ((dim0 == 2 || dim0 == 8) || dim0 == 16)) && (((unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.guest_state.iwk_enckey)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm))) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U))) || (((((0 == i && i == 0) && ((dim0 == 2 || dim0 == 8) || dim0 == 16)) && (((unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.guest_state.iwk_enckey)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm))) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U))) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Info][Unsound] Unknown value in {&global_data_fv.xbuf.legacy_region.st_mm[def_exc:Unknown int([-31,31]); intervals:[0,15]; enums:not {} ([-31,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((global_data_fv.attributes_fixed0 == 0ULL && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.crystal_clock_frequency == 0ULL) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.global_lock.__annonCompField55.counter == 0) && (int )global_data_fv.global_lock.__annonCompField55.exclusive == 0) && (int )global_data_fv.global_state.sys_state == 0) && (int )global_data_fv.hkid == 0) && global_data_fv.hkid_mask == 0ULL) && global_data_fv.hkid_start_bit == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && (int )global_data_fv.kot.lock.__annonCompField55.counter == 0) && (int )global_data_fv.kot.lock.__annonCompField55.exclusive == 0) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && (int )global_data_fv.la57_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.lass_supported == 0) && global_data_fv.max_lbr_depth == 0U) && global_data_fv.max_pa == 0ULL) && (int )global_data_fv.min_update_hv == 0) && (int )global_data_fv.module_hv == 0) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_tsc_frequency == 0ULL) && (int )global_data_fv.no_downgrade == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && (int )global_data_fv.num_handoff_pages == 0) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && global_data_fv.num_of_init_lps == 0U) && global_data_fv.num_of_init_pkgs == 0U) && global_data_fv.num_of_lps == 0U) && global_data_fv.num_of_pkgs == 0U) && global_data_fv.num_of_tdmr_entries == 0U) && (int )global_data_fv.num_rdseed_pauses == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && global_data_fv.pkg_config_bitmap == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.private_hkid_max == 0U) && global_data_fv.private_hkid_min == 0U) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seamdb_index == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seamrr_size == 0ULL) && (int )global_data_fv.seamverifyreport_available == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.x2apic_core_id_mask == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.xbuf.xsave_header.xcomp_bv == 0ULL) && global_data_fv.xbuf.xsave_header.xstate_bv == 0ULL) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.xfd_faulting_mask == 0U) && (int )global_data_fv.xfd_supported == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && (int )sysinfo_table_fv.min_update_hv == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.num_handoff_pages == 0) && sysinfo_table_fv.num_stack_pages == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.stack_rgn_size == 0ULL) && (int )tdr_fv.key_management_fields.hkid == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.mig_count == 0ULL) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.curr_vm == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && tdvps_fv.management.last_exit_tsc == 0ULL) && tdvps_fv.management.last_seamdb_index == 0ULL) && (int )tdvps_fv.management.last_td_exit == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.reserved_0 == 0) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && (int )tdvps_fv.management.state == 0) && tdvps_fv.management.vcpu_epoch == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.exit_qualification == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.valid == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (dim0 == 8 || dim0 == 16)) && ((unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((4 <= i && i <= 16) || i == 3)) || ((((i == 2 && ((dim0 == 2 || dim0 == 8) || dim0 == 16)) && (((unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.guest_state.iwk_enckey)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm))) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U))) || ((((i == 1 && ((dim0 == 2 || dim0 == 8) || dim0 == 16)) && (((unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.guest_state.iwk_enckey)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm))) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U))) || (((((0 == i && i == 0) && ((dim0 == 2 || dim0 == 8) || dim0 == 16)) && (((unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.guest_state.iwk_enckey)) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.xmm))) || (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xbuf.legacy_region.st_mm)))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U))) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3575:1-3575:1)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3575:1-3575:1)
[Info][Unsound] Unknown value in {&global_data_fv.xbuf.legacy_region.xmm} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3649:5-3649:61)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3649:5-3649:61)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3649:5-3649:61)
[Warning][Unknown] lval (& dest)->xmm points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Info][Unsound] Unknown value in {&global_data_fv.xbuf.legacy_region.xmm[def_exc:Unknown int([0,31]); intervals:[0,15]; enums:not {} ([0,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Info][Unsound] Unknown value in {&global_data_fv.xbuf.legacy_region.xmm[def_exc:Unknown int([-31,31]); intervals:[0,15]; enums:not {} ([-31,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Info][Unsound] Unknown value in {&global_data_fv.xbuf.legacy_region.xmm[def_exc:Unknown int([-31,31]); intervals:[0,15]; enums:not {} ([-31,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Info][Unsound] Unknown value in {&global_data_fv.xbuf.legacy_region.xmm[def_exc:Unknown int([-31,31]); intervals:[0,15]; enums:not {} ([-31,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Info][Unsound] Unknown value in {&global_data_fv.xbuf.legacy_region.xmm[def_exc:Unknown int([-31,31]); intervals:[0,15]; enums:not {} ([-31,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3650:5-3650:72)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3650:5-3650:72)
[Warning][Unknown] lval (& dest)->reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_1 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->legacy_region points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3651:1-3651:1)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3651:1-3651:1)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3686:5-3686:62)
[Warning][Unknown] lval (& dest)->xsave_header points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->xsave_header points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3653:6-3653:54)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3653:6-3653:54)
[Warning][Unknown] lval (& dest)->xsave_header points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3654:6-3654:53)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3654:6-3654:53)
[Warning][Unknown] lval (& dest)->xsave_header points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3655:5-3655:70)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3655:5-3655:70)
[Warning][Unknown] lval (& dest)->reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->xsave_header points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->xsave_header points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->xsave_header points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->xsave_header points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->xsave_header points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->xsave_header points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->xsave_header points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->xsave_header points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->xsave_header points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->xsave_header points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->xsave_header points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->xsave_header points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->xsave_header points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->xsave_header points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3656:1-3656:1)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3656:1-3656:1)
[Warning][Unknown] lval (& dest)->xbuf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3687:1-3687:1)
[Warning][Unknown] lval (& dest)->global_lock points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->global_lock points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3689:6-3689:45)
[Warning][Unknown] lval (& dest)->global_lock points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3690:1-3690:1)
[Info][Unsound] Unknown value in {&global_data_fv.seamdb_nonce} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3907:5-3907:57)
[Info][Unsound] Unknown value in {&global_data_fv.seamdb_nonce.bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->seamdb_nonce points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->seamdb_nonce points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->bytes points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->seamdb_nonce points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->seamdb_nonce points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->seamdb_nonce points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->seamdb_nonce points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->seamdb_nonce points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->seamdb_nonce points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->seamdb_nonce points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->seamdb_nonce points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->seamdb_nonce points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->seamdb_nonce points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->seamdb_nonce points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->bytes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->seamdb_nonce points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->seamdb_nonce points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3693:1-3693:1)
[Warning][Unknown] lval (& dest)->global_state points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->global_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3695:6-3695:50)
[Warning][Unknown] lval (& dest)->global_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3696:1-3696:1)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3704:5-3704:53)
[Warning][Unknown] lval (& dest)->lock points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->lock points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3689:6-3689:45)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3689:6-3689:45)
[Warning][Unknown] lval (& dest)->lock points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3690:1-3690:1)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3690:1-3690:1)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3705:5-3705:76)
[Warning][Unknown] lval (& dest)->entries points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3698:14-3698:19)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3698:14-3698:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 2048) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.kot.entries))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 2048) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 2048 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3698:14-3698:19)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3699:10-3699:60)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3700:10-3700:53)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3698:14-3698:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 2048) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.kot.entries))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 2048) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 2048 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3698:14-3698:19)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3699:10-3699:60)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3700:10-3700:53)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3698:14-3698:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 2048) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.kot.entries))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 2048) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 2048 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3698:14-3698:19)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3699:10-3699:60)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3700:10-3700:53)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3698:14-3698:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 2048) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.kot.entries))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 2048) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && 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global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && 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global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 2048 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3698:14-3698:19)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3699:10-3699:60)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3700:10-3700:53)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3698:14-3698:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 2048) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.kot.entries))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 2048) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 2048 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3698:14-3698:19)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3699:10-3699:60)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3700:10-3700:53)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3698:14-3698:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 2048) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.kot.entries))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 2048) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 2048 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3698:14-3698:19)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3702:1-3702:1)
[Warning][Unknown] lval (& dest)->kot points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3706:1-3706:1)
[Warning][Unknown] lval (& dest)->wbt_entries points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3708:14-3708:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 8) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.wbt_entries))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 8) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && 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global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 8 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3708:14-3708:19)
[Warning][Unknown] lval (*(& dest))[i].hkid_flushed points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].hkid_flushed points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (*(& dest))[i].hkid_flushed points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].hkid_flushed points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].hkid_flushed points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].hkid_flushed points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].hkid_flushed points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].hkid_flushed points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].hkid_flushed points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].hkid_flushed points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].hkid_flushed points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].hkid_flushed points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].hkid_flushed points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 8) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.wbt_entries))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 8) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 8 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3708:14-3708:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 8) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.wbt_entries))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 8) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 8 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3708:14-3708:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 8) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.wbt_entries))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 8) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && 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global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && 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global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 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global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 8 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3708:14-3708:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 8) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.wbt_entries))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 8) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 8 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3708:14-3708:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 8) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.wbt_entries))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 8) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 8 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3708:14-3708:19)
[Warning][Unknown] lval (& dest)->tdmr_table points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3715:14-3715:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 && ((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1)) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && 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global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3715:14-3715:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && 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global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && 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global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && 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global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 && ((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1)) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && 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global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && 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global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3715:14-3715:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && 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global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && 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global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && 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global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && 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global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 && ((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1)) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3715:14-3715:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && 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global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && 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global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && 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global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && 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global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 && ((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1)) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3715:14-3715:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && 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global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && 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global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && 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global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 && ((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1)) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3715:14-3715:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && 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global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && 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global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && 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global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:18-3724:23)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 && ((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1)) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_table))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL) && global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL) && global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL) && global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL) && global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL) && global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL) && global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_tdmr_entries == 0U) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3715:14-3715:19)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3789:6-3789:60)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3790:5-3790:66)
[Warning][Unknown] lval (& dest)->ia32_vmx_basic points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_vmx_basic points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3732:6-3732:48)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3732:6-3732:48)
[Warning][Unknown] lval (& dest)->ia32_vmx_basic points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3733:1-3733:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3733:1-3733:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3791:5-3791:70)
[Warning][Unknown] lval (& dest)->ia32_vmx_misc points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_vmx_misc points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3735:6-3735:48)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3735:6-3735:48)
[Warning][Unknown] lval (& dest)->ia32_vmx_misc points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3736:1-3736:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3736:1-3736:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3792:5-3792:86)
[Warning][Unknown] lval (& dest)->ia32_vmx_true_pinbased_ctls points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_vmx_true_pinbased_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3738:6-3738:48)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3738:6-3738:48)
[Warning][Unknown] lval (& dest)->ia32_vmx_true_pinbased_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3739:1-3739:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3739:1-3739:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3793:5-3793:87)
[Warning][Unknown] lval (& dest)->ia32_vmx_true_procbased_ctls points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_vmx_true_procbased_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3738:6-3738:48)
[Warning][Unknown] lval (& dest)->ia32_vmx_true_procbased_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3739:1-3739:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3794:5-3794:83)
[Warning][Unknown] lval (& dest)->ia32_vmx_procbased_ctls2 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_vmx_procbased_ctls2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3738:6-3738:48)
[Warning][Unknown] lval (& dest)->ia32_vmx_procbased_ctls2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3739:1-3739:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3795:5-3795:81)
[Warning][Unknown] lval (& dest)->ia32_vmx_procbased_ctls3 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_vmx_procbased_ctls3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3741:6-3741:48)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3741:6-3741:48)
[Warning][Unknown] lval (& dest)->ia32_vmx_procbased_ctls3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3742:1-3742:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3742:1-3742:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3796:5-3796:82)
[Warning][Unknown] lval (& dest)->ia32_vmx_true_exit_ctls points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_vmx_true_exit_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3738:6-3738:48)
[Warning][Unknown] lval (& dest)->ia32_vmx_true_exit_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3739:1-3739:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3797:5-3797:83)
[Warning][Unknown] lval (& dest)->ia32_vmx_true_entry_ctls points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_vmx_true_entry_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3738:6-3738:48)
[Warning][Unknown] lval (& dest)->ia32_vmx_true_entry_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3739:1-3739:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3798:6-3798:66)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3799:5-3799:65)
[Warning][Unknown] lval (& dest)->ia32_vmx_cr0_fixed0 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_vmx_cr0_fixed0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3744:6-3744:48)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3744:6-3744:48)
[Warning][Unknown] lval (& dest)->ia32_vmx_cr0_fixed0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3745:1-3745:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3745:1-3745:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3800:5-3800:65)
[Warning][Unknown] lval (& dest)->ia32_vmx_cr0_fixed1 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_vmx_cr0_fixed1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3744:6-3744:48)
[Warning][Unknown] lval (& dest)->ia32_vmx_cr0_fixed1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3745:1-3745:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3801:5-3801:65)
[Warning][Unknown] lval (& dest)->ia32_vmx_cr4_fixed0 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_vmx_cr4_fixed0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3747:6-3747:48)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3747:6-3747:48)
[Warning][Unknown] lval (& dest)->ia32_vmx_cr4_fixed0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3748:1-3748:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3748:1-3748:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3802:5-3802:65)
[Warning][Unknown] lval (& dest)->ia32_vmx_cr4_fixed1 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_vmx_cr4_fixed1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3747:6-3747:48)
[Warning][Unknown] lval (& dest)->ia32_vmx_cr4_fixed1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3748:1-3748:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3803:5-3803:68)
[Warning][Unknown] lval (& dest)->ia32_mtrrcap points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_mtrrcap points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3750:6-3750:48)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3750:6-3750:48)
[Warning][Unknown] lval (& dest)->ia32_mtrrcap points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3751:1-3751:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3751:1-3751:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3804:5-3804:88)
[Warning][Unknown] lval (& dest)->ia32_arch_capabilities points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_arch_capabilities points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3753:6-3753:48)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3753:6-3753:48)
[Warning][Unknown] lval (& dest)->ia32_arch_capabilities points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3754:1-3754:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3754:1-3754:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3805:5-3805:94)
[Warning][Unknown] lval (& dest)->ia32_xapic_disable_status points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_xapic_disable_status points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3756:6-3756:48)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3756:6-3756:48)
[Warning][Unknown] lval (& dest)->ia32_xapic_disable_status points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3757:1-3757:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3757:1-3757:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3806:5-3806:88)
[Warning][Unknown] lval (& dest)->ia32_core_capabilities points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_core_capabilities points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3759:6-3759:48)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3759:6-3759:48)
[Warning][Unknown] lval (& dest)->ia32_core_capabilities points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3760:1-3760:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3760:1-3760:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3807:5-3807:82)
[Warning][Unknown] lval (& dest)->ia32_perf_capabilities points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_perf_capabilities points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3762:6-3762:48)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3762:6-3762:48)
[Warning][Unknown] lval (& dest)->ia32_perf_capabilities points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3763:1-3763:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3763:1-3763:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3808:5-3808:76)
[Warning][Unknown] lval (& dest)->ia32_tme_capability points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_tme_capability points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3765:6-3765:48)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3765:6-3765:48)
[Warning][Unknown] lval (& dest)->ia32_tme_capability points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3766:1-3766:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3766:1-3766:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3809:5-3809:72)
[Warning][Unknown] lval (& dest)->ia32_tme_activate points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_tme_activate points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3768:6-3768:48)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3768:6-3768:48)
[Warning][Unknown] lval (& dest)->ia32_tme_activate points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3769:1-3769:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3769:1-3769:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3810:5-3810:92)
[Warning][Unknown] lval (& dest)->ia32_tme_keyid_partitioning points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_tme_keyid_partitioning points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3771:6-3771:48)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3771:6-3771:48)
[Warning][Unknown] lval (& dest)->ia32_tme_keyid_partitioning points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3772:1-3772:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3772:1-3772:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3811:5-3811:88)
[Warning][Unknown] lval (& dest)->ia32_misc_package_ctls points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_misc_package_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3774:6-3774:48)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3774:6-3774:48)
[Warning][Unknown] lval (& dest)->ia32_misc_package_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3775:1-3775:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3775:1-3775:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3812:5-3812:64)
[Warning][Unknown] lval (& dest)->smrr points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3783:14-3783:19)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3783:14-3783:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 2 || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.plt_common_config.smrr))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 2) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 2 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3783:14-3783:19)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3784:9-3784:63)
[Warning][Unknown] lval (*(& dest))[i].smrr_base points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (*(& dest))[i].smrr_base points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3777:6-3777:48)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3777:6-3777:48)
[Warning][Unknown] lval (*(& dest))[i].smrr_base points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3778:1-3778:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3778:1-3778:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3785:9-3785:63)
[Warning][Unknown] lval (*(& dest))[i].smrr_mask points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (*(& dest))[i].smrr_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3780:6-3780:48)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3780:6-3780:48)
[Warning][Unknown] lval (*(& dest))[i].smrr_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3781:1-3781:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3781:1-3781:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3783:14-3783:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 2 || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.plt_common_config.smrr))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 2) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 2 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3783:14-3783:19)
[Info][Unsound] Unknown value in {&global_data_fv.plt_common_config.smrr[def_exc:Unknown int([0,8]); intervals:[0,1]; enums:not {} ([-31,31])].smrr_base} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3784:9-3784:63)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3784:9-3784:63)
[Info][Unsound] Unknown value in {&global_data_fv.plt_common_config.smrr[def_exc:Unknown int([0,8]); intervals:[0,1]; enums:not {} ([-31,31])].smrr_mask} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3785:9-3785:63)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3785:9-3785:63)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3783:14-3783:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 2 || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.plt_common_config.smrr))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 2) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 2 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3783:14-3783:19)
[Info][Unsound] Unknown value in {&global_data_fv.plt_common_config.smrr[def_exc:Unknown int([0,16]); intervals:[0,1]; enums:not {} ([-31,31])].smrr_base} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3784:9-3784:63)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3784:9-3784:63)
[Info][Unsound] Unknown value in {&global_data_fv.plt_common_config.smrr[def_exc:Unknown int([0,16]); intervals:[0,1]; enums:not {} ([-31,31])].smrr_mask} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3785:9-3785:63)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3785:9-3785:63)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3783:14-3783:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 2 || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.plt_common_config.smrr))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 2) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 2 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3783:14-3783:19)
[Info][Unsound] Unknown value in {&global_data_fv.plt_common_config.smrr[def_exc:Unknown int([-31,31]); intervals:[0,1]; enums:not {} ([-31,31])].smrr_base} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3784:9-3784:63)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3784:9-3784:63)
[Info][Unsound] Unknown value in {&global_data_fv.plt_common_config.smrr[def_exc:Unknown int([-31,31]); intervals:[0,1]; enums:not {} ([-31,31])].smrr_mask} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3785:9-3785:63)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3785:9-3785:63)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3783:14-3783:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 2 || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.plt_common_config.smrr))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 2) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 2 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3783:14-3783:19)
[Info][Unsound] Unknown value in {&global_data_fv.plt_common_config.smrr[def_exc:Unknown int([-31,31]); intervals:[0,1]; enums:not {} ([-31,31])].smrr_base} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3784:9-3784:63)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3784:9-3784:63)
[Info][Unsound] Unknown value in {&global_data_fv.plt_common_config.smrr[def_exc:Unknown int([-31,31]); intervals:[0,1]; enums:not {} ([-31,31])].smrr_mask} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3785:9-3785:63)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3785:9-3785:63)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3783:14-3783:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 2 || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.plt_common_config.smrr))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 2) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.xfd_supported == 0) && global_data_fv.xfd_faulting_mask == 0U) && global_data_fv.xcr0_supported_mask == 0U) && global_data_fv.x2apic_pkg_id_shift_count == 0U) && global_data_fv.x2apic_core_id_shift_count == 0U) && global_data_fv.x2apic_core_id_mask == 0U) && (int )global_data_fv.waitpkg_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seamrr_size == 0ULL) && global_data_fv.seamrr_base == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && (int )global_data_fv.rtm_supported == 0) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.perfmon_ext_leaf_supported == 0) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.num_of_cached_sub_blocks == 0ULL) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_tsc_frequency == 0ULL) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && (int )global_data_fv.lass_supported == 0) && (int )global_data_fv.lam_supported == 0) && (int )global_data_fv.la57_supported == 0) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.kl_loadiwk_no_backup == 0) && global_data_fv.ia32_xss_supported_mask == 0U) && (int )global_data_fv.hle_supported == 0) && global_data_fv.fc_bitmap == 0U) && (int )global_data_fv.ddpd_supported == 0) && global_data_fv.crystal_clock_frequency == 0ULL) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 2 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3783:14-3783:19)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3787:1-3787:1)
[Warning][Unknown] lval (& dest)->plt_common_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3813:1-3813:1)
[Warning][Unknown] lval (& dest)->xsave_comp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:14-3815:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 19) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xsave_comp))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 19) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && global_data_fv.fc_bitmap == 0U) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 19 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:14-3815:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 19) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xsave_comp))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 19) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && global_data_fv.fc_bitmap == 0U) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 19 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:14-3815:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 19) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xsave_comp))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 19) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && global_data_fv.fc_bitmap == 0U) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 19 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:14-3815:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 19) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xsave_comp))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 19) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && global_data_fv.fc_bitmap == 0U) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 19 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:14-3815:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 19) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xsave_comp))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 19) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && global_data_fv.fc_bitmap == 0U) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 19 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:14-3815:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 19) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.xsave_comp))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 19) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && global_data_fv.fc_bitmap == 0U) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 19 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:14-3815:19)
[Warning][Unknown] lval (& dest)->cpuid_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:14-3827:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 68) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.cpuid_values))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 68) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && global_data_fv.fc_bitmap == 0U) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 68 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:14-3827:19)
[Warning][Unknown] lval (*(& dest))[i].leaf_subleaf points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (*(& dest))[i].leaf_subleaf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3821:6-3821:48)
[Warning][Unknown] lval (*(& dest))[i].leaf_subleaf points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3822:1-3822:1)
[Info][Unsound] Unknown value in {&global_data_fv.cpuid_values[def_exc:Unknown int([0,31]); intervals:[0,67]; enums:not {} ([0,31])].values.values} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3824:5-3824:66)
[Warning][Unknown] lval (*(& dest))[i].values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3824:5-3824:66)
[Warning][Unknown] lval (& dest)->values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (*(& dest))[i].values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 576) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && ((dim0 == 4 || dim0 == 19) || dim0 == 576)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->values points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (*(& dest))[i].values points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (*(& dest))[i].values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (*(& dest))[i].values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 576) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && ((dim0 == 4 || dim0 == 19) || dim0 == 576)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (*(& dest))[i].values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (*(& dest))[i].values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 576) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && ((dim0 == 4 || dim0 == 19) || dim0 == 576)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (*(& dest))[i].values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (*(& dest))[i].values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 576) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && ((dim0 == 4 || dim0 == 19) || dim0 == 576)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (*(& dest))[i].values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (*(& dest))[i].values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 576) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && ((dim0 == 4 || dim0 == 19) || dim0 == 576)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (*(& dest))[i].values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (*(& dest))[i].values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 576) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && ((dim0 == 4 || dim0 == 19) || dim0 == 576)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3500:1-3500:1)
[Warning][Unknown] lval (*(& dest))[i].values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3500:1-3500:1)
[Warning][Unknown] lval (*(& dest))[i].values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3825:1-3825:1)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 68) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.cpuid_values))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 68) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && global_data_fv.fc_bitmap == 0U) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 68 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:14-3827:19)
[Info][Unsound] Unknown value in {&global_data_fv.cpuid_values[def_exc:Unknown int([-31,31]); intervals:[0,67]; enums:not {} ([-31,31])].leaf_subleaf} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3828:9-3828:82)
[Info][Unsound] Unknown value in {&global_data_fv.cpuid_values[def_exc:Unknown int([-31,31]); intervals:[0,67]; enums:not {} ([-31,31])].values} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3829:9-3829:77)
[Info][Unsound] Unknown value in {&global_data_fv.cpuid_values[def_exc:Unknown int([-31,31]); intervals:[0,67]; enums:not {} ([-31,31])].values.values} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3824:5-3824:66)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 68) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.cpuid_values))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 68) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && global_data_fv.fc_bitmap == 0U) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 68 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:14-3827:19)
[Info][Unsound] Unknown value in {&global_data_fv.cpuid_values[def_exc:Unknown int([-31,31]); intervals:[0,67]; enums:not {} ([-31,31])].leaf_subleaf} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3828:9-3828:82)
[Info][Unsound] Unknown value in {&global_data_fv.cpuid_values[def_exc:Unknown int([-31,31]); intervals:[0,67]; enums:not {} ([-31,31])].values} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3829:9-3829:77)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 68) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.cpuid_values))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 68) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && global_data_fv.fc_bitmap == 0U) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 68 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:14-3827:19)
[Info][Unsound] Unknown value in {&global_data_fv.cpuid_values[def_exc:Unknown int([-31,31]); intervals:[0,67]; enums:not {} ([-31,31])].leaf_subleaf} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3828:9-3828:82)
[Info][Unsound] Unknown value in {&global_data_fv.cpuid_values[def_exc:Unknown int([-31,31]); intervals:[0,67]; enums:not {} ([-31,31])].values} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3829:9-3829:77)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 68) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.cpuid_values))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 68) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && global_data_fv.fc_bitmap == 0U) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 68 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:14-3827:19)
[Info][Unsound] Unknown value in {&global_data_fv.cpuid_values[def_exc:Unknown int([-31,31]); intervals:[0,67]; enums:not {} ([-31,31])].leaf_subleaf} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3828:9-3828:82)
[Info][Unsound] Unknown value in {&global_data_fv.cpuid_values[def_exc:Unknown int([-31,31]); intervals:[0,67]; enums:not {} ([-31,31])].values} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3829:9-3829:77)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 68) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.cpuid_values))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 68) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.td_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.td_vmcs_values.procbased_ctls == 0U) && global_data_fv.td_vmcs_values.pinbased_ctls == 0U) && global_data_fv.td_vmcs_values.exit_ctls == 0U) && global_data_fv.td_vmcs_values.entry_ctls == 0U) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_vmcs_host_values.TR.value == 0ULL) && global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL) && global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL) && global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && (int )global_data_fv.num_fixed_ctrs == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && global_data_fv.max_lbr_depth == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL) && global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U) && global_data_fv.l2_vmcs_values.procbased_ctls == 0U) && global_data_fv.l2_vmcs_values.pinbased_ctls == 0U) && global_data_fv.l2_vmcs_values.exit_ctls == 0U) && global_data_fv.l2_vmcs_values.entry_ctls == 0U) && global_data_fv.fc_bitmap == 0U) && global_data_fv.cpuid_last_extended_leaf == 0U) && global_data_fv.cpuid_last_base_leaf == 0U) && global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL) && global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL) && global_data_fv.attributes_fixed1 == 0ULL) && global_data_fv.attributes_fixed0 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 68 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:14-3827:19)
[Warning][Unknown] lval (& dest)->td_vmcs_values points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->td_vmcs_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3833:6-3833:53)
[Warning][Unknown] lval (& dest)->td_vmcs_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3834:6-3834:54)
[Warning][Unknown] lval (& dest)->td_vmcs_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3835:6-3835:55)
[Warning][Unknown] lval (& dest)->td_vmcs_values points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->td_vmcs_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3836:6-3836:60)
[Warning][Unknown] lval (& dest)->td_vmcs_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3837:6-3837:49)
[Warning][Unknown] lval (& dest)->td_vmcs_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3838:6-3838:50)
[Warning][Unknown] lval (& dest)->td_vmcs_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3839:1-3839:1)
[Warning][Unknown] lval (& dest)->l2_vmcs_values points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->l2_vmcs_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3833:6-3833:53)
[Warning][Unknown] lval (& dest)->l2_vmcs_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3834:6-3834:54)
[Warning][Unknown] lval (& dest)->l2_vmcs_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3835:6-3835:55)
[Warning][Unknown] lval (& dest)->l2_vmcs_values points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->l2_vmcs_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3836:6-3836:60)
[Warning][Unknown] lval (& dest)->l2_vmcs_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3837:6-3837:49)
[Warning][Unknown] lval (& dest)->l2_vmcs_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3838:6-3838:50)
[Warning][Unknown] lval (& dest)->l2_vmcs_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3839:1-3839:1)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3845:5-3845:64)
[Warning][Unknown] lval (& dest)->CR0 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->CR0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3841:6-3841:53)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3841:6-3841:53)
[Warning][Unknown] lval (& dest)->CR0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3842:6-3842:50)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3842:6-3842:50)
[Warning][Unknown] lval (& dest)->CR0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3843:1-3843:1)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3843:1-3843:1)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3846:5-3846:64)
[Warning][Unknown] lval (& dest)->CR3 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->CR3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3841:6-3841:53)
[Warning][Unknown] lval (& dest)->CR3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3842:6-3842:50)
[Warning][Unknown] lval (& dest)->CR3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3843:1-3843:1)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3847:5-3847:64)
[Warning][Unknown] lval (& dest)->CR4 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->CR4 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3841:6-3841:53)
[Warning][Unknown] lval (& dest)->CR4 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3842:6-3842:50)
[Warning][Unknown] lval (& dest)->CR4 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3843:1-3843:1)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3848:5-3848:63)
[Warning][Unknown] lval (& dest)->CS points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->CS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3841:6-3841:53)
[Warning][Unknown] lval (& dest)->CS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3842:6-3842:50)
[Warning][Unknown] lval (& dest)->CS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3843:1-3843:1)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3849:5-3849:63)
[Warning][Unknown] lval (& dest)->SS points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->SS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3841:6-3841:53)
[Warning][Unknown] lval (& dest)->SS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3842:6-3842:50)
[Warning][Unknown] lval (& dest)->SS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3843:1-3843:1)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3850:5-3850:63)
[Warning][Unknown] lval (& dest)->FS points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->FS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3841:6-3841:53)
[Warning][Unknown] lval (& dest)->FS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3842:6-3842:50)
[Warning][Unknown] lval (& dest)->FS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3843:1-3843:1)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3851:5-3851:63)
[Warning][Unknown] lval (& dest)->GS points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->GS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3841:6-3841:53)
[Warning][Unknown] lval (& dest)->GS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3842:6-3842:50)
[Warning][Unknown] lval (& dest)->GS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3843:1-3843:1)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3852:5-3852:63)
[Warning][Unknown] lval (& dest)->TR points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->TR points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3841:6-3841:53)
[Warning][Unknown] lval (& dest)->TR points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3842:6-3842:50)
[Warning][Unknown] lval (& dest)->TR points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3843:1-3843:1)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3853:5-3853:71)
[Warning][Unknown] lval (& dest)->IA32_S_CET points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->IA32_S_CET points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3841:6-3841:53)
[Warning][Unknown] lval (& dest)->IA32_S_CET points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3842:6-3842:50)
[Warning][Unknown] lval (& dest)->IA32_S_CET points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3843:1-3843:1)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3854:5-3854:69)
[Warning][Unknown] lval (& dest)->IA32_PAT points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->IA32_PAT points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3841:6-3841:53)
[Warning][Unknown] lval (& dest)->IA32_PAT points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3842:6-3842:50)
[Warning][Unknown] lval (& dest)->IA32_PAT points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3843:1-3843:1)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3855:5-3855:70)
[Warning][Unknown] lval (& dest)->IA32_EFER points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->IA32_EFER points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3841:6-3841:53)
[Warning][Unknown] lval (& dest)->IA32_EFER points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3842:6-3842:50)
[Warning][Unknown] lval (& dest)->IA32_EFER points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3843:1-3843:1)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3856:5-3856:68)
[Warning][Unknown] lval (& dest)->FS_BASE points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->FS_BASE points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3841:6-3841:53)
[Warning][Unknown] lval (& dest)->FS_BASE points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3842:6-3842:50)
[Warning][Unknown] lval (& dest)->FS_BASE points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3843:1-3843:1)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3857:5-3857:70)
[Warning][Unknown] lval (& dest)->IDTR_BASE points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->IDTR_BASE points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3841:6-3841:53)
[Warning][Unknown] lval (& dest)->IDTR_BASE points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3842:6-3842:50)
[Warning][Unknown] lval (& dest)->IDTR_BASE points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3843:1-3843:1)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3858:5-3858:70)
[Warning][Unknown] lval (& dest)->GDTR_BASE points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->GDTR_BASE points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3841:6-3841:53)
[Warning][Unknown] lval (& dest)->GDTR_BASE points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3842:6-3842:50)
[Warning][Unknown] lval (& dest)->GDTR_BASE points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3843:1-3843:1)
[Warning][Unknown] lval (& dest)->seam_vmcs_host_values points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3859:1-3859:1)
[Warning][Unknown] lval (& dest)->config_flags_fixed0 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->config_flags_fixed0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3861:6-3861:48)
[Warning][Unknown] lval (& dest)->config_flags_fixed0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3862:1-3862:1)
[Warning][Unknown] lval (& dest)->config_flags_fixed1 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->config_flags_fixed1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3861:6-3861:48)
[Warning][Unknown] lval (& dest)->config_flags_fixed1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3862:1-3862:1)
[Warning][Unknown] lval (& dest)->tdmr_info_copy points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3864:14-3864:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 && ((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1)) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3864:14-3864:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 && ((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1)) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3864:14-3864:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 && ((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1)) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3864:14-3864:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 && ((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1)) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3864:14-3864:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 && ((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1)) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3864:14-3864:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:18-3873:23)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 && ((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1)) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& global_data_fv.tdmr_info_copy))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 64) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U) && sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == 0) && (int )sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == 0) && (int )global_data_fv.sha384_method.is_initialized == 0) && (int )global_data_fv.seamverifyreport_available == 0) && global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL) && global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL) && global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U) && global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U) && global_data_fv.platform_fms.__annonCompField29.processor_type == 0U) && global_data_fv.platform_fms.__annonCompField29.model == 0U) && global_data_fv.platform_fms.__annonCompField29.family == 0U) && global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U) && global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U) && (int )global_data_fv.num_rdseed_retries == 0) && (int )global_data_fv.num_rdseed_pauses == 0) && global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U) && global_data_fv.native_model_info.__annonCompField30.core_type == 0U) && (int )fv_exception_tracker_gp == 0) && 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3864:14-3864:19)
[Warning][Unknown] lval (& dest)->seam_capabilities points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->seam_capabilities points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3880:6-3880:48)
[Warning][Unknown] lval (& dest)->seam_capabilities points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3881:1-3881:1)
[Warning][Unknown] lval (& dest)->sha384_method points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3883:5-3883:80)
[Warning][Unknown] lval (& dest)->hash_method_buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->sha384_method points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->hash_method_buffer points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->sha384_method points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->hash_method_buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->sha384_method points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->hash_method_buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->sha384_method points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->hash_method_buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->sha384_method points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->hash_method_buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->sha384_method points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->hash_method_buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->sha384_method points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->hash_method_buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->sha384_method points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->hash_method_buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->sha384_method points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->hash_method_buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->sha384_method points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->hash_method_buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->sha384_method points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->hash_method_buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->sha384_method points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->hash_method_buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->sha384_method points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->sha384_method points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3884:6-3884:55)
[Warning][Unknown] lval (& dest)->sha384_method points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3885:1-3885:1)
[Warning][Unknown] lval (& dest)->platform_fms points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->platform_fms points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3887:6-3887:43)
[Warning][Unknown] lval (& dest)->platform_fms points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3888:1-3888:1)
[Warning][Unknown] lval (& dest)->native_model_info points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->native_model_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3890:6-3890:43)
[Warning][Unknown] lval (& dest)->native_model_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3891:1-3891:1)
[Info][Unsound] Unknown value in {&sysinfo_table_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4402:5-4402:59)
[Info][Unsound] Unknown value in {&sysinfo_table_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4370:5-4370:51)
[Warning][Unknown] lval (& dest)->__annonCompField71.stack_canary.reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->__annonCompField71.stack_canary.reserved_1 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->__annonCompField71.stack_canary.reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->__annonCompField71.stack_canary.reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->__annonCompField71.stack_canary.reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->__annonCompField71.stack_canary.reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->__annonCompField71.stack_canary.reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->__annonCompField71.stack_canary.reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->__annonCompField71.stack_canary.reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->__annonCompField71.stack_canary.reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->__annonCompField71.stack_canary.reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->__annonCompField71.stack_canary.reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->__annonCompField71.stack_canary.reserved_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->cmr_data points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4332:14-4332:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 32) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& sysinfo_table_fv.cmr_data))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 32) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && (int )fv_exception_tracker_gp == 0) && 32 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4332:14-4332:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 32) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& sysinfo_table_fv.cmr_data))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 32) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && (int )fv_exception_tracker_gp == 0) && 32 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4332:14-4332:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 32) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& sysinfo_table_fv.cmr_data))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 32) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && (int )fv_exception_tracker_gp == 0) && 32 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4332:14-4332:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 32) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& sysinfo_table_fv.cmr_data))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 32) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && (int )fv_exception_tracker_gp == 0) && 32 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4332:14-4332:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 32) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& sysinfo_table_fv.cmr_data))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 32) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && (int )fv_exception_tracker_gp == 0) && 32 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4332:14-4332:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 32) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& sysinfo_table_fv.cmr_data))) && (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL) && (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL) && (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL) && (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL) && (int )((unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency) == 0) && (unsigned int )tdcs_fv.management_fields.op_state == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U) && (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U) && (unsigned int )tdr_fv.management_fields.num_tdcx == 0U) && (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U) && (int )((unsigned char )tdcs_fv.executions_ctl_fields.gpaw) == 0) && dim0 == 32) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == 0) && tdcs_fv.management_fields.num_vcpus == 0U) && (int )tdcs_fv.management_fields.num_l2_vms == 0) && tdcs_fv.management_fields.num_assoc_vcpus == 0U) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == 0) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL) && tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL) && tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == 0) && (int )tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == 0) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL) && tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )tdr_fv.td_preserving_fields.handoff_version == 0) && (int )tdr_fv.management_fields.fatal == 0) && (int )tdr_fv.key_management_fields.hkid == 0) && sysinfo_table_fv.stack_rgn_size == 0ULL) && sysinfo_table_fv.stack_rgn_base == 0ULL) && sysinfo_table_fv.seam_status == 0ULL) && sysinfo_table_fv.num_tls_pages == 0ULL) && sysinfo_table_fv.num_stack_pages == 0ULL) && (int )sysinfo_table_fv.num_handoff_pages == 0) && (int )sysinfo_table_fv.no_downgrade == 0) && (int )sysinfo_table_fv.module_hv == 0) && (int )sysinfo_table_fv.min_update_hv == 0) && sysinfo_table_fv.keyhole_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_rgn_base == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL) && sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL) && sysinfo_table_fv.data_rgn_size == 0ULL) && sysinfo_table_fv.data_rgn_base == 0ULL) && sysinfo_table_fv.code_rgn_size == 0ULL) && sysinfo_table_fv.code_rgn_base == 0ULL) && (int )fv_exception_tracker_gp == 0) && 32 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4332:14-4332:19)
[Warning][Unknown] lval (& dest)->reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_2 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->reserved_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_3 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->reserved_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->reserved_4 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_4 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->reserved_4 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_4 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_4 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_4 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_4 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_4 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_4 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_4 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_4 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_4 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_4 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Info][Unsound] Unknown value in {&tdr_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4403:5-4403:39)
[Info][Unsound] Unknown value in {&tdr_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4373:5-4373:41)
[Info][Unsound] Unknown value in {&tdr_fv.management_fields} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4011:5-4011:86)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3991:6-3991:46)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3992:6-3992:48)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3992:6-3992:48)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3993:6-3993:52)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3993:6-3993:52)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:22:136-22:139)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3979:13-3979:36)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3981:16-3981:32)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3983:16-3983:34)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3985:16-3985:26)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3987:16-3987:27)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3994:6-3994:71)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3994:6-3994:71)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3995:5-3995:73)
[Warning][Unknown] lval (& dest)->tdcx_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->tdcx_pa points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->tdcx_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->tdcx_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->tdcx_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->tdcx_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->tdcx_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->tdcx_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->tdcx_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->tdcx_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->tdcx_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->tdcx_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->tdcx_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Info][Unsound] Unknown value in {&tdr_fv.management_fields.td_uuid} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3996:5-3996:52)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3996:5-3996:52)
[Info][Unsound] Unknown value in {&tdr_fv.management_fields.td_uuid.bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->td_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->td_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_uuid points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->td_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->td_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3693:1-3693:1)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3693:1-3693:1)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3997:5-3997:73)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3998:1-3998:1)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4000:6-4000:46)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4001:6-4001:62)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4001:6-4001:62)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4002:5-4002:70)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->key_management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4003:1-4003:1)
[Info][Unsound] Unknown value in {&tdr_fv.td_preserving_fields} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4013:5-4013:89)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4005:6-4005:57)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4006:6-4006:57)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4006:6-4006:57)
[Info][Unsound] Unknown value in {&tdr_fv.td_preserving_fields.seamdb_nonce} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4007:5-4007:57)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4007:5-4007:57)
[Info][Unsound] Unknown value in {&tdr_fv.td_preserving_fields.seamdb_nonce.bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3693:1-3693:1)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4008:5-4008:70)
[Warning][Unknown] lval (& dest)->td_preserving_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4009:1-4009:1)
[Info][Unsound] Unknown value in {&tdcs_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4404:5-4404:41)
[Info][Unsound] Unknown value in {&tdcs_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4376:5-4376:42)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4043:6-4043:49)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4044:6-4044:55)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4017:13-4017:36)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4019:16-4019:38)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4021:16-4021:36)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4023:16-4023:33)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4025:16-4025:36)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4027:16-4027:38)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4029:16-4029:36)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4031:16-4031:38)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4033:16-4033:37)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4035:16-4035:36)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4037:16-4037:36)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4039:16-4039:38)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4045:6-4045:54)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4046:5-4046:65)
[Warning][Unknown] lval (& dest)->op_state_lock points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->op_state_lock points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3964:6-3964:45)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3964:6-3964:45)
[Warning][Unknown] lval (& dest)->op_state_lock points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3965:1-3965:1)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3965:1-3965:1)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4047:5-4047:71)
[Warning][Unknown] lval (& dest)->reserved_0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_0 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->reserved_0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4048:6-4048:52)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4049:5-4049:73)
[Warning][Unknown] lval (& dest)->management_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4050:1-4050:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4084:5-4084:73)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4052:6-4052:48)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4053:1-4053:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4085:6-4085:49)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4085:6-4085:49)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4086:6-4086:49)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4086:6-4086:49)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4087:6-4087:45)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4087:6-4087:45)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4088:5-4088:58)
[Warning][Unknown] lval (& dest)->eptp points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->eptp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4055:6-4055:48)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4055:6-4055:48)
[Warning][Unknown] lval (& dest)->eptp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4056:1-4056:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4056:1-4056:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4089:5-4089:64)
[Warning][Unknown] lval (& dest)->secure_ept_lock points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->secure_ept_lock points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3689:6-3689:45)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3689:6-3689:45)
[Warning][Unknown] lval (& dest)->secure_ept_lock points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3690:1-3690:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3690:1-3690:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4090:6-4090:55)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4090:6-4090:55)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4091:6-4091:59)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4091:6-4091:59)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4092:6-4092:55)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4092:6-4092:55)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4093:5-4093:67)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4058:6-4058:64)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4058:6-4058:64)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4059:6-4059:54)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4059:6-4059:54)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4060:6-4060:63)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4060:6-4060:63)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4061:6-4061:54)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4061:6-4061:54)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4062:6-4062:58)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4062:6-4062:58)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4063:6-4063:54)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4063:6-4063:54)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4064:6-4064:58)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4064:6-4064:58)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4065:6-4065:54)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4065:6-4065:54)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4066:6-4066:55)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4066:6-4066:55)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4067:6-4067:55)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4067:6-4067:55)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4068:6-4068:55)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4068:6-4068:55)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4069:6-4069:67)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4069:6-4069:67)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4070:5-4070:70)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4070:5-4070:70)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->cpuid_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4071:1-4071:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4071:1-4071:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4094:6-4094:50)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4094:6-4094:50)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4095:5-4095:66)
[Warning][Unknown] lval (& dest)->notify_enables points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->notify_enables points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4073:6-4073:48)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4073:6-4073:48)
[Warning][Unknown] lval (& dest)->notify_enables points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4074:1-4074:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4074:1-4074:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4096:6-4096:60)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4096:6-4096:60)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4097:5-4097:64)
[Warning][Unknown] lval (& dest)->vm_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4076:14-4076:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4076:14-4076:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.executions_ctl_fields.vm_ctls))) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4076:14-4076:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4077:10-4077:55)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4076:14-4076:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.executions_ctl_fields.vm_ctls))) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4076:14-4076:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4077:10-4077:55)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4076:14-4076:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.executions_ctl_fields.vm_ctls))) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4076:14-4076:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4077:10-4077:55)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4076:14-4076:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.executions_ctl_fields.vm_ctls))) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4076:14-4076:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4077:10-4077:55)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4076:14-4076:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.executions_ctl_fields.vm_ctls))) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4076:14-4076:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4077:10-4077:55)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4076:14-4076:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.executions_ctl_fields.vm_ctls))) && (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )tdcs_fv.executions_ctl_fields.topology_enum_configured == 0) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL) && tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL) && tdcs_fv.executions_ctl_fields.reserved_1 == 0U) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL) && tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == 0) && tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4076:14-4076:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4079:1-4079:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4098:6-4098:64)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4098:6-4098:64)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4099:5-4099:68)
[Warning][Unknown] lval (& dest)->config_flags points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->config_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3861:6-3861:48)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3861:6-3861:48)
[Warning][Unknown] lval (& dest)->config_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3862:1-3862:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3862:1-3862:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4100:5-4100:52)
[Warning][Unknown] lval (& dest)->td_ctls points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->td_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4081:6-4081:48)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4081:6-4081:48)
[Warning][Unknown] lval (& dest)->td_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4082:1-4082:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4082:1-4082:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4101:6-4101:50)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4102:6-4102:65)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4103:5-4103:71)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4104:5-4104:73)
[Warning][Unknown] lval (& dest)->cpuid_valid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->cpuid_valid points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->cpuid_valid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->cpuid_valid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->cpuid_valid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->cpuid_valid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->cpuid_valid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->cpuid_valid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->cpuid_valid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->cpuid_valid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->cpuid_valid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->cpuid_valid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->cpuid_valid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4105:5-4105:74)
[Warning][Unknown] lval (& dest)->xbuff_offsets points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->xbuff_offsets points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->xbuff_offsets points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->xbuff_offsets points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->xbuff_offsets points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->xbuff_offsets points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->xbuff_offsets points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->xbuff_offsets points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->xbuff_offsets points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->xbuff_offsets points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->xbuff_offsets points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->xbuff_offsets points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->xbuff_offsets points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3500:1-3500:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3500:1-3500:1)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4106:5-4106:72)
[Warning][Unknown] lval (& dest)->executions_ctl_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4107:1-4107:1)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4117:5-4117:81)
[Info][Unsound] Unknown value in {&tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.raw} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4114:5-4114:48)
[Warning][Unknown] lval (& dest)->epoch_and_refcount points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4114:5-4114:48)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4114:5-4114:48)
[Info][Unsound] Unknown value in {&tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.raw.bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3577:5-3577:67)
[Warning][Unknown] lval (& dest)->__annonCompField65.raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3577:5-3577:67)
[Warning][Unknown] lval (& dest)->epoch_and_refcount points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3577:5-3577:67)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3577:5-3577:67)
[Warning][Unknown] lval (& dest)->__annonCompField65.raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->epoch_and_refcount points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->__annonCompField65.raw points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->epoch_and_refcount points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->__annonCompField65.raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->epoch_and_refcount points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->__annonCompField65.raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->epoch_and_refcount points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->__annonCompField65.raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->epoch_and_refcount points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->__annonCompField65.raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->epoch_and_refcount points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->__annonCompField65.raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->epoch_and_refcount points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->__annonCompField65.raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->epoch_and_refcount points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->__annonCompField65.raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->epoch_and_refcount points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->__annonCompField65.raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->epoch_and_refcount points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->__annonCompField65.raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->epoch_and_refcount points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->__annonCompField65.raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->epoch_and_refcount points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->__annonCompField65.raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->epoch_and_refcount points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->__annonCompField65.raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3578:1-3578:1)
[Warning][Unknown] lval (& dest)->epoch_and_refcount points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3578:1-3578:1)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3578:1-3578:1)
[Warning][Unknown] lval (& dest)->epoch_and_refcount points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4115:1-4115:1)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4115:1-4115:1)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4118:5-4118:59)
[Warning][Unknown] lval (& dest)->epoch_lock points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->epoch_lock points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3689:6-3689:45)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3689:6-3689:45)
[Warning][Unknown] lval (& dest)->epoch_lock points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3690:1-3690:1)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3690:1-3690:1)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4119:5-4119:70)
[Warning][Unknown] lval (& dest)->epoch_tracking points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4120:1-4120:1)
[Info][Unsound] Unknown value in {&tdcs_fv.measurement_fields} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4230:5-4230:86)
[Info][Unsound] Unknown value in {&tdcs_fv.measurement_fields.mr_td} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4134:5-4134:60)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4134:5-4134:60)
[Info][Unsound] Unknown value in {&tdcs_fv.measurement_fields.mr_td.bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4122:5-4122:67)
[Warning][Unknown] lval (& dest)->mr_td points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4122:5-4122:67)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4122:5-4122:67)
[Warning][Unknown] lval (& dest)->mr_td points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_td points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->mr_td points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_td points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_td points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_td points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_td points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_td points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_td points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_td points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_td points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_td points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_td points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->mr_td points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4123:1-4123:1)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4123:1-4123:1)
[Info][Unsound] Unknown value in {&tdcs_fv.measurement_fields.mr_config_id} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4135:5-4135:67)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4135:5-4135:67)
[Info][Unsound] Unknown value in {&tdcs_fv.measurement_fields.mr_config_id.bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4122:5-4122:67)
[Warning][Unknown] lval (& dest)->mr_config_id points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4122:5-4122:67)
[Warning][Unknown] lval (& dest)->mr_config_id points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_config_id points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->mr_config_id points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_config_id points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_config_id points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_config_id points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_config_id points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_config_id points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_config_id points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_config_id points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_config_id points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_config_id points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_config_id points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->mr_config_id points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4123:1-4123:1)
[Info][Unsound] Unknown value in {&tdcs_fv.measurement_fields.mr_owner} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4136:5-4136:63)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4136:5-4136:63)
[Info][Unsound] Unknown value in {&tdcs_fv.measurement_fields.mr_owner.bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4122:5-4122:67)
[Warning][Unknown] lval (& dest)->mr_owner points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4122:5-4122:67)
[Warning][Unknown] lval (& dest)->mr_owner points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_owner points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->mr_owner points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_owner points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_owner points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_owner points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_owner points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_owner points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_owner points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_owner points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_owner points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_owner points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_owner points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->mr_owner points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4123:1-4123:1)
[Info][Unsound] Unknown value in {&tdcs_fv.measurement_fields.mr_owner_config} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4137:5-4137:70)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4137:5-4137:70)
[Info][Unsound] Unknown value in {&tdcs_fv.measurement_fields.mr_owner_config.bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4122:5-4122:67)
[Warning][Unknown] lval (& dest)->mr_owner_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4122:5-4122:67)
[Warning][Unknown] lval (& dest)->mr_owner_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_owner_config points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->mr_owner_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_owner_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_owner_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_owner_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_owner_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_owner_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_owner_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_owner_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_owner_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mr_owner_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mr_owner_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->mr_owner_config points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4123:1-4123:1)
[Info][Unsound] Unknown value in {&tdcs_fv.measurement_fields.rtmr} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4138:5-4138:71)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4138:5-4138:71)
[Warning][Unknown] lval (& dest)->rtmr points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4125:14-4125:19)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4125:14-4125:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.measurement_fields.rtmr))) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4125:14-4125:19)
[Info][Unsound] Unknown value in {&tdcs_fv.measurement_fields.rtmr[def_exc:Unknown int([0,7]); intervals:[0,3]; enums:{0, 1, 2, 3, 4}].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4126:9-4126:74)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4126:9-4126:74)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4125:14-4125:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.measurement_fields.rtmr))) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4125:14-4125:19)
[Info][Unsound] Unknown value in {&tdcs_fv.measurement_fields.rtmr[def_exc:Unknown int([0,8]); intervals:[0,3]; enums:not {} ([-31,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4126:9-4126:74)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4126:9-4126:74)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4125:14-4125:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.measurement_fields.rtmr))) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4125:14-4125:19)
[Info][Unsound] Unknown value in {&tdcs_fv.measurement_fields.rtmr[def_exc:Unknown int([0,16]); intervals:[0,3]; enums:not {} ([-31,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4126:9-4126:74)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4126:9-4126:74)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4125:14-4125:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.measurement_fields.rtmr))) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4125:14-4125:19)
[Info][Unsound] Unknown value in {&tdcs_fv.measurement_fields.rtmr[def_exc:Unknown int([-31,31]); intervals:[0,3]; enums:not {} ([-31,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4126:9-4126:74)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4126:9-4126:74)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4125:14-4125:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.measurement_fields.rtmr))) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4125:14-4125:19)
[Info][Unsound] Unknown value in {&tdcs_fv.measurement_fields.rtmr[def_exc:Unknown int([-31,31]); intervals:[0,3]; enums:not {} ([-31,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4126:9-4126:74)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4126:9-4126:74)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4125:14-4125:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.measurement_fields.rtmr))) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL) && tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && tdcs_fv.migration_fields.total_mb_count == 0ULL) && (int )tdcs_fv.migration_fields.num_migs == 0) && tdcs_fv.migration_fields.num_migrated_vcpus == 0U) && (int )tdcs_fv.migration_fields.mig_working_version == 0) && (int )tdcs_fv.migration_fields.mig_version == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == 0) && (int )tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == 0) && tdcs_fv.migration_fields.mig_epoch == 0U) && (int )tdcs_fv.migration_fields.mig_dec_key_set == 0) && tdcs_fv.migration_fields.mig_count == 0ULL) && tdcs_fv.migration_fields.import_count == 0U) && tdcs_fv.migration_fields.export_count == 0U) && tdcs_fv.migration_fields.dirty_count == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL) && tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL) && tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == 0) && (int )tdcs_fv.measurement_fields.last_teeinfo_hash_valid == 0) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4125:14-4125:19)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4128:1-4128:1)
[Info][Unsound] Unknown value in {&tdcs_fv.measurement_fields.last_teeinfo_hash} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4139:5-4139:72)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4139:5-4139:72)
[Info][Unsound] Unknown value in {&tdcs_fv.measurement_fields.last_teeinfo_hash.bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4122:5-4122:67)
[Warning][Unknown] lval (& dest)->last_teeinfo_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4122:5-4122:67)
[Warning][Unknown] lval (& dest)->last_teeinfo_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->last_teeinfo_hash points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->last_teeinfo_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->last_teeinfo_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->last_teeinfo_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->last_teeinfo_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->last_teeinfo_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->last_teeinfo_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->last_teeinfo_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->last_teeinfo_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->last_teeinfo_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->last_teeinfo_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->last_teeinfo_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->last_teeinfo_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4123:1-4123:1)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4140:5-4140:61)
[Warning][Unknown] lval (& dest)->rtmr_lock points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->rtmr_lock points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3964:6-3964:45)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3964:6-3964:45)
[Warning][Unknown] lval (& dest)->rtmr_lock points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3965:1-3965:1)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3965:1-3965:1)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4141:6-4141:64)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4142:5-4142:72)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4143:5-4143:65)
[Warning][Unknown] lval (& dest)->td_sha_ctx points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->td_sha_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4130:6-4130:67)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4130:6-4130:67)
[Warning][Unknown] lval (& dest)->td_sha_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4131:5-4131:69)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4131:5-4131:69)
[Warning][Unknown] lval (& dest)->buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_sha_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->buffer points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->td_sha_ctx points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_sha_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_sha_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_sha_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_sha_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_sha_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_sha_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_sha_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_sha_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_sha_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_sha_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->buffer points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->td_sha_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->td_sha_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4132:1-4132:1)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4132:1-4132:1)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4144:5-4144:72)
[Warning][Unknown] lval (& dest)->measurement_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4145:1-4145:1)
[Info][Unsound] Unknown value in {&tdcs_fv.migration_fields} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4231:5-4231:82)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4147:6-4147:56)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4148:6-4148:52)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4149:6-4149:52)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4150:6-4150:49)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4151:5-4151:58)
[Warning][Unknown] lval (& dest)->bw_epoch points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->bw_epoch points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3967:6-3967:48)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3967:6-3967:48)
[Warning][Unknown] lval (& dest)->bw_epoch points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3968:1-3968:1)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3968:1-3968:1)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4152:6-4152:59)
[Info][Unsound] Unknown value in {&tdcs_fv.migration_fields.mig_dec_key} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4153:5-4153:56)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4153:5-4153:56)
[Info][Unsound] Unknown value in {&tdcs_fv.migration_fields.mig_dec_key.bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->mig_dec_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->mig_dec_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_dec_key points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->mig_dec_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_dec_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_dec_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_dec_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_dec_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_dec_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_dec_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_dec_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_dec_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_dec_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_dec_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->mig_dec_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3693:1-3693:1)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3693:1-3693:1)
[Info][Unsound] Unknown value in {&tdcs_fv.migration_fields.mig_dec_working_key} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4154:5-4154:64)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4154:5-4154:64)
[Info][Unsound] Unknown value in {&tdcs_fv.migration_fields.mig_dec_working_key.bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->mig_dec_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->mig_dec_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_dec_working_key points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->mig_dec_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_dec_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_dec_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_dec_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_dec_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_dec_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_dec_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_dec_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_dec_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_dec_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_dec_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->mig_dec_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3693:1-3693:1)
[Info][Unsound] Unknown value in {&tdcs_fv.migration_fields.mig_enc_key} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4155:5-4155:56)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4155:5-4155:56)
[Info][Unsound] Unknown value in {&tdcs_fv.migration_fields.mig_enc_key.bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->mig_enc_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->mig_enc_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_enc_key points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->mig_enc_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_enc_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_enc_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_enc_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_enc_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_enc_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_enc_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_enc_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_enc_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_enc_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_enc_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->mig_enc_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3693:1-3693:1)
[Info][Unsound] Unknown value in {&tdcs_fv.migration_fields.mig_enc_working_key} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4156:5-4156:64)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4156:5-4156:64)
[Info][Unsound] Unknown value in {&tdcs_fv.migration_fields.mig_enc_working_key.bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->mig_enc_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->mig_enc_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_enc_working_key points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->mig_enc_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_enc_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_enc_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_enc_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_enc_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_enc_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_enc_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_enc_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_enc_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->mig_enc_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->mig_enc_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->mig_enc_working_key points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3693:1-3693:1)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4157:6-4157:53)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4158:6-4158:61)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4159:6-4159:56)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4160:6-4160:54)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4161:6-4161:50)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4162:5-4162:71)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4163:6-4163:58)
[Info][Unsound] Unknown value in {&tdcs_fv.migration_fields.preimport_uuid} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4164:5-4164:59)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4164:5-4164:59)
[Info][Unsound] Unknown value in {&tdcs_fv.migration_fields.preimport_uuid.bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->preimport_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->preimport_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->preimport_uuid points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->preimport_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->preimport_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->preimport_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->preimport_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->preimport_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->preimport_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->preimport_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->preimport_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->preimport_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->preimport_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->preimport_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->preimport_uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3693:1-3693:1)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4165:5-4165:57)
[Warning][Unknown] lval (& dest)->mig_lock points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->mig_lock points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3689:6-3689:45)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3689:6-3689:45)
[Warning][Unknown] lval (& dest)->mig_lock points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3690:1-3690:1)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3690:1-3690:1)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4166:5-4166:73)
[Warning][Unknown] lval (& dest)->migration_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4167:1-4167:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4172:5-4172:71)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_basic points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_basic points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3732:6-3732:48)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3732:6-3732:48)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_basic points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3733:1-3733:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3733:1-3733:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4173:5-4173:75)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_misc points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_misc points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3735:6-3735:48)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3735:6-3735:48)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_misc points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3736:1-3736:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3736:1-3736:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4174:5-4174:70)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_cr0_fixed0 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_cr0_fixed0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3744:6-3744:48)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3744:6-3744:48)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_cr0_fixed0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3745:1-3745:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3745:1-3745:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4175:5-4175:70)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_cr0_fixed1 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_cr0_fixed1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3744:6-3744:48)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_cr0_fixed1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3745:1-3745:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4176:5-4176:70)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_cr4_fixed0 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_cr4_fixed0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3747:6-3747:48)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3747:6-3747:48)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_cr4_fixed0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3748:1-3748:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3748:1-3748:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4177:5-4177:70)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_cr4_fixed1 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_cr4_fixed1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3747:6-3747:48)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_cr4_fixed1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3748:1-3748:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4178:5-4178:88)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_procbased_ctls2 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_procbased_ctls2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3738:6-3738:48)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3738:6-3738:48)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_procbased_ctls2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3739:1-3739:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3739:1-3739:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4179:5-4179:91)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_ept_vpid_cap points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_ept_vpid_cap points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4169:6-4169:48)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4169:6-4169:48)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_ept_vpid_cap points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4170:1-4170:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4170:1-4170:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4180:5-4180:91)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_true_pinbased_ctls points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_true_pinbased_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3738:6-3738:48)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_true_pinbased_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3739:1-3739:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4181:5-4181:92)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_true_procbased_ctls points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_true_procbased_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3738:6-3738:48)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_true_procbased_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3739:1-3739:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4182:5-4182:87)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_true_exit_ctls points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_true_exit_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3738:6-3738:48)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_true_exit_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3739:1-3739:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4183:5-4183:88)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_true_entry_ctls points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_true_entry_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3738:6-3738:48)
[Warning][Unknown] lval (& dest)->virt_ia32_vmx_true_entry_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3739:1-3739:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4184:6-4184:65)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4185:6-4185:74)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4186:6-4186:69)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4187:6-4187:72)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4188:5-4188:71)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->virt_msrs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4189:1-4189:1)
[Warning][Unknown] lval (& dest)->cpuid_config_vals points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4191:14-4191:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 80) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.cpuid_config_vals))) && dim0 == 80) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && (int )fv_exception_tracker_gp == 0) && 80 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4191:14-4191:19)
[Info][Unsound] Unknown value in {&tdcs_fv.cpuid_config_vals[def_exc:Unknown int([0,31]); intervals:[0,79]; enums:not {} ([0,31])].values} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4192:9-4192:73)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 80) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.cpuid_config_vals))) && dim0 == 80) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && (int )fv_exception_tracker_gp == 0) && 80 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4191:14-4191:19)
[Info][Unsound] Unknown value in {&tdcs_fv.cpuid_config_vals[def_exc:Unknown int([-31,31]); intervals:[0,79]; enums:not {} ([-31,31])].values} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4192:9-4192:73)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 80) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.cpuid_config_vals))) && dim0 == 80) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && (int )fv_exception_tracker_gp == 0) && 80 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4191:14-4191:19)
[Info][Unsound] Unknown value in {&tdcs_fv.cpuid_config_vals[def_exc:Unknown int([-31,31]); intervals:[0,79]; enums:not {} ([-31,31])].values} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4192:9-4192:73)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 80) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.cpuid_config_vals))) && dim0 == 80) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && (int )fv_exception_tracker_gp == 0) && 80 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4191:14-4191:19)
[Info][Unsound] Unknown value in {&tdcs_fv.cpuid_config_vals[def_exc:Unknown int([-31,31]); intervals:[0,79]; enums:not {} ([-31,31])].values} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4192:9-4192:73)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 80) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.cpuid_config_vals))) && dim0 == 80) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && (int )fv_exception_tracker_gp == 0) && 80 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4191:14-4191:19)
[Info][Unsound] Unknown value in {&tdcs_fv.cpuid_config_vals[def_exc:Unknown int([-31,31]); intervals:[0,79]; enums:not {} ([-31,31])].values} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4192:9-4192:73)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 80) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.cpuid_config_vals))) && dim0 == 80) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )tdcs_fv.service_td_fields.servtd_num == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == 0) && (int )tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == 0) && (int )fv_exception_tracker_gp == 0) && 80 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4191:14-4191:19)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4234:5-4234:84)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_hash} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4211:5-4211:66)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4211:5-4211:66)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_hash.bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4122:5-4122:67)
[Warning][Unknown] lval (& dest)->servtd_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4122:5-4122:67)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4122:5-4122:67)
[Warning][Unknown] lval (& dest)->servtd_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->servtd_hash points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->servtd_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->servtd_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->servtd_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->servtd_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->servtd_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->servtd_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->servtd_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->servtd_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->servtd_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->servtd_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->servtd_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->servtd_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4123:1-4123:1)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4123:1-4123:1)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4212:6-4212:52)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4213:5-4213:72)
[Warning][Unknown] lval (& dest)->servtd_bindings_lock points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->servtd_bindings_lock points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3964:6-3964:45)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3964:6-3964:45)
[Warning][Unknown] lval (& dest)->servtd_bindings_lock points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3965:1-3965:1)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3965:1-3965:1)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4214:5-4214:72)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_bindings_table} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4215:5-4215:92)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4215:5-4215:92)
[Warning][Unknown] lval (& dest)->servtd_bindings_table points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:14-4199:19)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:14-4199:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (i == 1 || (0 == i && i == 0))) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.service_td_fields.servtd_bindings_table))) && dim0 == 1) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 1 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:14-4199:19)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4200:10-4200:53)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4201:10-4201:58)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4202:10-4202:53)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4203:10-4203:57)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_bindings_table[0].attributes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4204:9-4204:78)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4204:9-4204:78)
[Warning][Unknown] lval (*(& dest))[i].attributes points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (*(& dest))[i].attributes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4196:6-4196:48)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4196:6-4196:48)
[Warning][Unknown] lval (*(& dest))[i].attributes points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4197:1-4197:1)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4197:1-4197:1)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_bindings_table[0].uuid} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4205:9-4205:56)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4205:9-4205:56)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_bindings_table[0].uuid.bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (*(& dest))[i].uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3692:5-3692:67)
[Warning][Unknown] lval (*(& dest))[i].uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].uuid points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (*(& dest))[i].uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (*(& dest))[i].uuid points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3693:1-3693:1)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3693:1-3693:1)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_bindings_table[0].info_hash} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4206:9-4206:71)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4206:9-4206:71)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_bindings_table[0].info_hash.bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4122:5-4122:67)
[Warning][Unknown] lval (*(& dest))[i].info_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4122:5-4122:67)
[Warning][Unknown] lval (*(& dest))[i].info_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].info_hash points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (*(& dest))[i].info_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].info_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].info_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].info_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].info_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].info_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].info_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].info_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].info_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].info_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].info_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (*(& dest))[i].info_hash points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4123:1-4123:1)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4207:9-4207:79)
[Warning][Unknown] lval (*(& dest))[i].reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].reserved_2 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (*(& dest))[i].reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].reserved_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:14-4199:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (i == 1 || (0 == i && i == 0))) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.service_td_fields.servtd_bindings_table))) && dim0 == 1) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 1 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:14-4199:19)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4200:10-4200:53)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4201:10-4201:58)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4202:10-4202:53)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4203:10-4203:57)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_bindings_table[0].attributes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4204:9-4204:78)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4204:9-4204:78)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_bindings_table[0].uuid} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4205:9-4205:56)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4205:9-4205:56)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_bindings_table[0].info_hash} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4206:9-4206:71)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4206:9-4206:71)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4207:9-4207:79)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:14-4199:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (i == 1 || (0 == i && i == 0))) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.service_td_fields.servtd_bindings_table))) && dim0 == 1) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 1 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:14-4199:19)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4200:10-4200:53)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4201:10-4201:58)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4202:10-4202:53)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4203:10-4203:57)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_bindings_table[0].attributes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4204:9-4204:78)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4204:9-4204:78)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_bindings_table[0].uuid} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4205:9-4205:56)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4205:9-4205:56)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_bindings_table[0].info_hash} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4206:9-4206:71)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4206:9-4206:71)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4207:9-4207:79)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:14-4199:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (i == 1 || (0 == i && i == 0))) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.service_td_fields.servtd_bindings_table))) && dim0 == 1) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 1 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:14-4199:19)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4200:10-4200:53)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4201:10-4201:58)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4202:10-4202:53)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4203:10-4203:57)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_bindings_table[0].attributes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4204:9-4204:78)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4204:9-4204:78)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_bindings_table[0].uuid} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4205:9-4205:56)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4205:9-4205:56)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_bindings_table[0].info_hash} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4206:9-4206:71)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4206:9-4206:71)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4207:9-4207:79)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:14-4199:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (i == 1 || (0 == i && i == 0))) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.service_td_fields.servtd_bindings_table))) && dim0 == 1) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 1 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:14-4199:19)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4200:10-4200:53)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4201:10-4201:58)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4202:10-4202:53)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4203:10-4203:57)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_bindings_table[0].attributes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4204:9-4204:78)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4204:9-4204:78)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_bindings_table[0].uuid} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4205:9-4205:56)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4205:9-4205:56)
[Info][Unsound] Unknown value in {&tdcs_fv.service_td_fields.servtd_bindings_table[0].info_hash} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4206:9-4206:71)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4206:9-4206:71)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4207:9-4207:79)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:14-4199:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (i == 1 || (0 == i && i == 0))) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.service_td_fields.servtd_bindings_table))) && dim0 == 1) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 1 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:14-4199:19)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4209:1-4209:1)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4216:5-4216:73)
[Warning][Unknown] lval (& dest)->service_td_fields points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4217:1-4217:1)
[Warning][Unknown] lval (& dest)->x2apic_ids points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->x2apic_ids points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->x2apic_ids points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->x2apic_ids points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->x2apic_ids points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->x2apic_ids points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->x2apic_ids points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->x2apic_ids points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->x2apic_ids points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->x2apic_ids points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->x2apic_ids points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->x2apic_ids points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->x2apic_ids points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3500:1-3500:1)
[Warning][Unknown] lval (& dest)->reserved_io points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_io points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->reserved_io points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_io points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_io points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_io points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_io points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_io points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_io points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_io points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_io points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_io points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_io points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->MSR_BITMAPS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->MSR_BITMAPS points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->MSR_BITMAPS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->MSR_BITMAPS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->MSR_BITMAPS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->MSR_BITMAPS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->MSR_BITMAPS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->MSR_BITMAPS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->MSR_BITMAPS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->MSR_BITMAPS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->MSR_BITMAPS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->MSR_BITMAPS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->MSR_BITMAPS points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->sept_root_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->sept_root_page points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->sept_root_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->sept_root_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->sept_root_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->sept_root_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->sept_root_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->sept_root_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->sept_root_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->sept_root_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->sept_root_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->sept_root_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->sept_root_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->zero_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->zero_page points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->zero_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->zero_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->zero_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->zero_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->zero_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->zero_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->zero_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->zero_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->zero_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->zero_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->zero_page points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Info][Unsound] Unknown value in {&tdcs_fv.__annonCompField70.__annonCompField69.b_migsc_link} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4240:5-4240:66)
[Warning][Unknown] lval (& dest)->__annonCompField70.__annonCompField69.b_migsc_link points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->__annonCompField70.__annonCompField69.b_migsc_link points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4224:6-4224:48)
[Warning][Unknown] lval (& dest)->__annonCompField70.__annonCompField69.b_migsc_link points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4225:1-4225:1)
[Info][Unsound] Unknown value in {&tdcs_fv.__annonCompField70.__annonCompField69.f_migsc_links} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4241:5-4241:81)
[Warning][Unknown] lval (& dest)->__annonCompField70.__annonCompField69.f_migsc_links points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:14-4219:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 511) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.__annonCompField70.__annonCompField69.f_migsc_links))) && dim0 == 511) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 511 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:14-4219:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 511) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.__annonCompField70.__annonCompField69.f_migsc_links))) && dim0 == 511) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 511 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:14-4219:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 511) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.__annonCompField70.__annonCompField69.f_migsc_links))) && dim0 == 511) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 511 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:14-4219:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 511) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.__annonCompField70.__annonCompField69.f_migsc_links))) && dim0 == 511) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 511 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:14-4219:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 511) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.__annonCompField70.__annonCompField69.f_migsc_links))) && dim0 == 511) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 511 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:14-4219:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 511) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdcs_fv.__annonCompField70.__annonCompField69.f_migsc_links))) && dim0 == 511) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.ve_info.valid == 0U) && tdvps_fv.ve_info.gpa == 0ULL) && tdvps_fv.ve_info.gla == 0ULL) && tdvps_fv.ve_info.exit_reason == 0U) && tdvps_fv.ve_info.exit_qualification == 0ULL) && (int )tdvps_fv.ve_info.eptp_index == 0) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U) && tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U) && tdvps_fv.management.xfam == 0ULL) && tdvps_fv.management.vcpu_index == 0U) && tdvps_fv.management.vcpu_epoch == 0ULL) && (int )tdvps_fv.management.state == 0) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && (int )tdvps_fv.management.reserved_0 == 0) && (int )tdvps_fv.management.possibly_epf_stepping == 0) && (int )tdvps_fv.management.pend_nmi == 0) && (int )tdvps_fv.management.num_tdvps_pages == 0) && (int )tdvps_fv.management.nmi_unblocking_due_to_iret == 0) && (int )tdvps_fv.management.last_td_exit == 0) && tdvps_fv.management.last_seamdb_index == 0ULL) && tdvps_fv.management.last_exit_tsc == 0ULL) && (int )tdvps_fv.management.last_epf_gpa_list_idx == 0) && (int )tdvps_fv.management.l2_exit_host_routed == 0) && tdvps_fv.management.hp_lock_busy_start == 0ULL) && (int )tdvps_fv.management.hp_lock_busy == 0) && tdvps_fv.management.export_count == 0U) && (int )tdvps_fv.management.curr_vm == 0) && (int )tdvps_fv.management.cpuid_user_ve == 0) && (int )tdvps_fv.management.cpuid_supervisor_ve == 0) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.management.assoc_lpid == 0U) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 511 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:14-4219:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_1 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_2 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_3 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->L2_SEPT_ROOT_3 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Info][Unsound] Unknown value in {&tdvps_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4405:5-4405:43)
[Info][Unsound] Unknown value in {&tdvps_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4379:5-4379:43)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3476:6-3476:51)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3477:6-3477:45)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3478:6-3478:63)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3479:6-3479:48)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3480:6-3480:48)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3481:6-3481:52)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3482:5-3482:70)
[Warning][Unknown] lval (& dest)->reserved0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved0 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->reserved0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved0 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3483:6-3483:62)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3484:5-3484:71)
[Warning][Unknown] lval (& dest)->reserved1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved1 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->reserved1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved1 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->ve_info points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3485:1-3485:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3502:6-3502:46)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3503:6-3503:53)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3504:6-3504:50)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3505:6-3505:51)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3506:6-3506:56)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3507:5-3507:75)
[Warning][Unknown] lval (& dest)->tdvps_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->tdvps_pa points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->tdvps_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->tdvps_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->tdvps_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->tdvps_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->tdvps_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->tdvps_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->tdvps_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->tdvps_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->tdvps_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->tdvps_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->tdvps_pa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3508:5-3508:72)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3509:6-3509:50)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3510:5-3510:71)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3511:6-3511:55)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3512:6-3512:60)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3513:6-3513:54)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3514:5-3514:71)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3515:6-3515:52)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3516:6-3516:58)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3517:6-3517:49)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3518:6-3518:67)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3519:5-3519:71)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3520:6-3520:49)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3521:6-3521:62)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3522:6-3522:62)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3523:5-3523:71)
[Warning][Unknown] lval (& dest)->reserved_5 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_5 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->reserved_5 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_5 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_5 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_5 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_5 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_5 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_5 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_5 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_5 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_5 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_5 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3524:6-3524:63)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3525:6-3525:53)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3526:5-3526:71)
[Warning][Unknown] lval (& dest)->reserved_6 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_6 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->reserved_6 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_6 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_6 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_6 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_6 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_6 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_6 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_6 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_6 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_6 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_6 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3527:6-3527:62)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:46:175-46:178)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3528:6-3528:49)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3529:6-3529:60)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3530:5-3530:71)
[Warning][Unknown] lval (& dest)->reserved_7 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_7 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->reserved_7 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_7 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_7 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_7 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_7 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_7 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_7 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_7 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_7 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_7 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_7 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3531:5-3531:72)
[Warning][Unknown] lval (& dest)->vm_launched points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->vm_launched points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->vm_launched points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->vm_launched points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->vm_launched points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->vm_launched points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->vm_launched points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->vm_launched points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->vm_launched points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->vm_launched points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->vm_launched points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->vm_launched points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->vm_launched points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3532:5-3532:85)
[Warning][Unknown] lval (& dest)->lp_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->lp_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->lp_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->lp_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->lp_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->lp_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->lp_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->lp_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->lp_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->lp_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->lp_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->lp_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->lp_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3533:5-3533:89)
[Warning][Unknown] lval (& dest)->module_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->module_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->module_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->module_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->module_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->module_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->module_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->module_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->module_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->module_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->module_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->module_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->module_dependent_hpa_updated points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3534:5-3534:71)
[Warning][Unknown] lval (& dest)->reserved_8 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_8 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->reserved_8 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_8 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_8 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_8 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_8 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_8 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_8 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_8 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_8 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_8 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_8 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3535:5-3535:75)
[Warning][Unknown] lval (& dest)->l2_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:14-3487:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:14-3487:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.management.l2_ctls))) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:14-3487:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3488:10-3488:55)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:14-3487:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.management.l2_ctls))) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:14-3487:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3488:10-3488:55)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:14-3487:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.management.l2_ctls))) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:14-3487:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3488:10-3488:55)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:14-3487:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.management.l2_ctls))) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:14-3487:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3488:10-3488:55)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:14-3487:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.management.l2_ctls))) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:14-3487:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3488:10-3488:55)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:14-3487:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.management.l2_ctls))) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:14-3487:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3490:1-3490:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3536:5-3536:85)
[Warning][Unknown] lval (& dest)->l2_debug_ctls points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:14-3492:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:14-3492:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.management.l2_debug_ctls))) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:14-3492:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3493:10-3493:55)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:14-3492:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.management.l2_debug_ctls))) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:14-3492:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3493:10-3493:55)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:14-3492:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.management.l2_debug_ctls))) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:14-3492:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3493:10-3493:55)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:14-3492:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.management.l2_debug_ctls))) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:14-3492:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3493:10-3493:55)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:14-3492:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.management.l2_debug_ctls))) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:14-3492:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3493:10-3493:55)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:14-3492:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.management.l2_debug_ctls))) && dim0 == 4) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )tdvps_fv.management.shadow_posted_int_notification_vector == 0) && tdvps_fv.management.shadow_pinbased_exec_ctls == 0U) && tdvps_fv.management.shadow_pid_hpa == 0ULL) && tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL) && tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL) && tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:14-3492:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3495:1-3495:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3537:5-3537:78)
[Warning][Unknown] lval (& dest)->tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3538:5-3538:85)
[Warning][Unknown] lval (& dest)->shadow_tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->shadow_tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_tsc_deadline points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3539:6-3539:72)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3540:6-3540:68)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3541:6-3541:72)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3542:6-3542:68)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3543:5-3543:92)
[Warning][Unknown] lval (& dest)->shadow_cr0_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr0_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->shadow_cr0_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr0_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr0_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr0_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr0_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr0_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr0_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr0_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr0_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr0_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr0_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3544:5-3544:88)
[Warning][Unknown] lval (& dest)->shadow_cr0_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr0_read_shadow points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->shadow_cr0_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr0_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr0_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr0_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr0_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr0_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr0_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr0_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr0_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr0_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr0_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3545:5-3545:92)
[Warning][Unknown] lval (& dest)->shadow_cr4_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr4_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->shadow_cr4_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr4_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr4_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr4_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr4_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr4_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr4_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr4_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr4_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr4_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr4_guest_host_mask points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3546:5-3546:88)
[Warning][Unknown] lval (& dest)->shadow_cr4_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr4_read_shadow points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->shadow_cr4_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr4_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr4_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr4_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr4_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr4_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr4_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr4_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr4_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_cr4_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_cr4_read_shadow points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3547:5-3547:80)
[Warning][Unknown] lval (& dest)->shadow_notify_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_notify_window points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->shadow_notify_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_notify_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_notify_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_notify_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_notify_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_notify_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_notify_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_notify_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_notify_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_notify_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_notify_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3500:1-3500:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3500:1-3500:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3548:6-3548:59)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3549:5-3549:72)
[Warning][Unknown] lval (& dest)->reserved_9 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_9 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->reserved_9 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_9 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_9 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_9 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_9 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_9 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_9 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_9 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_9 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_9 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_9 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3550:6-3550:65)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3551:5-3551:73)
[Warning][Unknown] lval (& dest)->reserved_10 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_10 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->reserved_10 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_10 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_10 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_10 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_10 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_10 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_10 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_10 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_10 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_10 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_10 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3552:5-3552:74)
[Warning][Unknown] lval (& dest)->shadow_ple_gap points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_ple_gap points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->shadow_ple_gap points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_ple_gap points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_ple_gap points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_ple_gap points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_ple_gap points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_ple_gap points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_ple_gap points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_ple_gap points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_ple_gap points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_ple_gap points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_ple_gap points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3500:1-3500:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3553:5-3553:77)
[Warning][Unknown] lval (& dest)->shadow_ple_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_ple_window points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->shadow_ple_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_ple_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_ple_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_ple_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_ple_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_ple_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_ple_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_ple_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_ple_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_ple_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_ple_window points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3500:1-3500:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3554:6-3554:79)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3555:5-3555:72)
[Warning][Unknown] lval (& dest)->reserved_11 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_11 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->reserved_11 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_11 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_11 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_11 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_11 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_11 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_11 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_11 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_11 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_11 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_11 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3556:5-3556:87)
[Warning][Unknown] lval (& dest)->shadow_procbased_exec_ctls2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_procbased_exec_ctls2 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->shadow_procbased_exec_ctls2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_procbased_exec_ctls2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_procbased_exec_ctls2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_procbased_exec_ctls2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_procbased_exec_ctls2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_procbased_exec_ctls2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_procbased_exec_ctls2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_procbased_exec_ctls2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_procbased_exec_ctls2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3498:10-3498:46)
[Warning][Unknown] lval (& dest)->shadow_procbased_exec_ctls2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3497:14-3497:19)
[Warning][Unknown] lval (& dest)->shadow_procbased_exec_ctls2 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3500:1-3500:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3557:5-3557:84)
[Warning][Unknown] lval (& dest)->shadow_shared_eptp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_shared_eptp points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->shadow_shared_eptp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_shared_eptp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_shared_eptp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_shared_eptp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_shared_eptp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_shared_eptp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_shared_eptp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_shared_eptp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_shared_eptp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->shadow_shared_eptp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->shadow_shared_eptp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3558:5-3558:90)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_gpa points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3559:5-3559:90)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_hpa points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_enter_guest_state_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3560:5-3560:77)
[Warning][Unknown] lval (& dest)->ve_info_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ve_info_gpa points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ve_info_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ve_info_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ve_info_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ve_info_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ve_info_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ve_info_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ve_info_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ve_info_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ve_info_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ve_info_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ve_info_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3561:5-3561:77)
[Warning][Unknown] lval (& dest)->ve_info_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ve_info_hpa points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ve_info_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ve_info_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ve_info_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ve_info_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ve_info_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ve_info_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ve_info_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ve_info_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ve_info_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ve_info_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ve_info_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3562:5-3562:78)
[Warning][Unknown] lval (& dest)->l2_vapic_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_vapic_gpa points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->l2_vapic_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_vapic_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_vapic_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_vapic_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_vapic_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_vapic_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_vapic_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_vapic_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_vapic_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_vapic_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_vapic_gpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3563:5-3563:78)
[Warning][Unknown] lval (& dest)->l2_vapic_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_vapic_hpa points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->l2_vapic_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_vapic_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_vapic_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_vapic_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_vapic_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_vapic_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_vapic_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_vapic_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_vapic_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->l2_vapic_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->l2_vapic_hpa points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3564:5-3564:74)
[Warning][Unknown] lval (& dest)->reserved_12 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_12 points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->reserved_12 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_12 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_12 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_12 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_12 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_12 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_12 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_12 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_12 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->reserved_12 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->reserved_12 points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->management points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3565:1-3565:1)
[Warning][Unknown] lval (& dest)->last_epf_gpa_list points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->last_epf_gpa_list points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->last_epf_gpa_list points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->last_epf_gpa_list points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->last_epf_gpa_list points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->last_epf_gpa_list points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->last_epf_gpa_list points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->last_epf_gpa_list points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->last_epf_gpa_list points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->last_epf_gpa_list points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->last_epf_gpa_list points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->last_epf_gpa_list points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->last_epf_gpa_list points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->cpuid_control points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:14-3567:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.cpuid_control))) && dim0 == 128) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:14-3567:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.cpuid_control))) && dim0 == 128) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:14-3567:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.cpuid_control))) && dim0 == 128) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:14-3567:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.cpuid_control))) && dim0 == 128) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:14-3567:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.cpuid_control))) && dim0 == 128) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:14-3567:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.cpuid_control))) && dim0 == 128) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.xcr0 == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL) && tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U) && tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL) && tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL) && tdvps_fv.guest_state.dr6 == 0ULL) && tdvps_fv.guest_state.dr3 == 0ULL) && tdvps_fv.guest_state.dr2 == 0ULL) && tdvps_fv.guest_state.dr1 == 0ULL) && tdvps_fv.guest_state.dr0 == 0ULL) && tdvps_fv.guest_state.cr2 == 0ULL) && tdvps_fv.guest_msr_state.ia32_xss == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL) && tdvps_fv.guest_msr_state.ia32_xfd == 0ULL) && tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL) && tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL) && tdvps_fv.guest_msr_state.ia32_star == 0ULL) && tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL) && tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL) && tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL) && tdvps_fv.guest_msr_state.ia32_lstar == 0ULL) && tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL) && tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL) && tdvps_fv.guest_msr_state.ia32_fmask == 0ULL) && tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL) && tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == 0) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == 0) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL) && tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL) && (int )tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == 0) && (int )fv_exception_tracker_gp == 0) && 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:14-3567:19)
[Info][Unsound] Unknown value in {&tdvps_fv.guest_state} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3675:5-3675:73)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3586:5-3586:63)
[Info][Unsound] Unknown value in {&tdvps_fv.guest_state.gpr_state.gprs} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3465:5-3465:71)
[Warning][Unknown] lval (& dest)->gpr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3465:5-3465:71)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3465:5-3465:71)
[Warning][Unknown] lval (& dest)->gpr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->gpr_state points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->gpr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->gpr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->gpr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->gpr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->gpr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->gpr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->gpr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->gpr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->gpr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->gpr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->gpr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->gpr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3466:1-3466:1)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3466:1-3466:1)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3587:6-3587:48)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3588:6-3588:48)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3589:6-3589:48)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3590:6-3590:48)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3591:6-3591:48)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3592:6-3592:49)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3593:6-3593:48)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3594:5-3594:69)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Info][Unsound] Unknown value in {&tdvps_fv.guest_state.iwk_enckey} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3595:5-3595:67)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3595:5-3595:67)
[Warning][Unknown] lval (& dest)->iwk_enckey points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Info][Unsound] Unknown value in {&tdvps_fv.guest_state.iwk_enckey[def_exc:Unknown int([0,31]); intervals:[0,15]; enums:not {} ([0,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Info][Unsound] Unknown value in {&tdvps_fv.guest_state.iwk_enckey[def_exc:Unknown int([-31,31]); intervals:[0,15]; enums:not {} ([-31,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Info][Unsound] Unknown value in {&tdvps_fv.guest_state.iwk_enckey[def_exc:Unknown int([-31,31]); intervals:[0,15]; enums:not {} ([-31,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Info][Unsound] Unknown value in {&tdvps_fv.guest_state.iwk_enckey[def_exc:Unknown int([-31,31]); intervals:[0,15]; enums:not {} ([-31,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Info][Unsound] Unknown value in {&tdvps_fv.guest_state.iwk_enckey[def_exc:Unknown int([-31,31]); intervals:[0,15]; enums:not {} ([-31,31])].bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3573:9-3573:74)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3572:14-3572:19)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3575:1-3575:1)
[Info][Unsound] Unknown value in {&tdvps_fv.guest_state.iwk_intkey} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3596:5-3596:55)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3596:5-3596:55)
[Info][Unsound] Unknown value in {&tdvps_fv.guest_state.iwk_intkey.bytes} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3577:5-3577:67)
[Warning][Unknown] lval (& dest)->iwk_intkey points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3577:5-3577:67)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3577:5-3577:67)
[Warning][Unknown] lval (& dest)->iwk_intkey points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->iwk_intkey points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->iwk_intkey points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->iwk_intkey points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->iwk_intkey points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->iwk_intkey points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->iwk_intkey points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->iwk_intkey points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->iwk_intkey points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->iwk_intkey points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->iwk_intkey points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->iwk_intkey points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->iwk_intkey points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->iwk_intkey points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3578:1-3578:1)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3578:1-3578:1)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3597:5-3597:66)
[Warning][Unknown] lval (& dest)->iwk_flags points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:43:165-43:168)
[Warning][Unknown] lval (& dest)->iwk_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3580:6-3580:43)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3580:6-3580:43)
[Warning][Unknown] lval (& dest)->iwk_flags points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3581:1-3581:1)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3581:1-3581:1)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3598:5-3598:71)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3599:5-3599:72)
[Warning][Unknown] lval (& dest)->vcpu_state_details points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->vcpu_state_details points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3583:6-3583:48)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3583:6-3583:48)
[Warning][Unknown] lval (& dest)->vcpu_state_details points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3584:1-3584:1)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3584:1-3584:1)
[Warning][Unknown] lval (& dest)->guest_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3600:1-3600:1)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3602:6-3602:59)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3603:6-3603:64)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3604:6-3604:58)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3605:5-3605:81)
[Warning][Unknown] lval (& dest)->ia32_perfevtsel points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_perfevtsel points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_perfevtsel points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_perfevtsel points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_perfevtsel points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_perfevtsel points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_perfevtsel points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_perfevtsel points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_perfevtsel points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_perfevtsel points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_perfevtsel points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_perfevtsel points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_perfevtsel points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3606:5-3606:82)
[Warning][Unknown] lval (& dest)->ia32_offcore_rsp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_offcore_rsp points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_offcore_rsp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_offcore_rsp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_offcore_rsp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_offcore_rsp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_offcore_rsp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_offcore_rsp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_offcore_rsp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_offcore_rsp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_offcore_rsp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_offcore_rsp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_offcore_rsp points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3607:6-3607:53)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3608:6-3608:57)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3609:5-3609:80)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3610:6-3610:62)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3611:6-3611:64)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3612:6-3612:68)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3613:6-3613:61)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3614:6-3614:63)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3615:6-3615:61)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3616:6-3616:63)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3617:5-3617:76)
[Warning][Unknown] lval (& dest)->ia32_a_pmc points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_a_pmc points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_a_pmc points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_a_pmc points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_a_pmc points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_a_pmc points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_a_pmc points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_a_pmc points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_a_pmc points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_a_pmc points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_a_pmc points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_a_pmc points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_a_pmc points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3618:6-3618:57)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3619:5-3619:91)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3620:5-3620:84)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_ext points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_fixed_ctr_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3621:5-3621:87)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_reload_cfg points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3622:5-3622:80)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_ext points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (& dest)->ia32_a_pmc_ext points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3623:6-3623:53)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3624:6-3624:59)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3625:6-3625:64)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3626:6-3626:54)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3627:6-3627:55)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3628:6-3628:55)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3629:6-3629:64)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3630:6-3630:57)
[Warning][Unknown] lval (& dest)->guest_msr_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3631:1-3631:1)
[Warning][Unknown] lval (& dest)->td_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3633:5-3633:71)
[Warning][Unknown] lval (& dest)->td_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_vmcs points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->td_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->td_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->td_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->td_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3634:1-3634:1)
[Info][Unsound] Unknown value in {&tdvps_fv.vapic.raw} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3636:5-3636:67)
[Warning][Unknown] lval (& dest)->vapic points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3636:5-3636:67)
[Warning][Unknown] lval (& dest)->raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->vapic points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->raw points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->vapic points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->vapic points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->vapic points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->vapic points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->vapic points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->vapic points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->vapic points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->vapic points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->vapic points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->vapic points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->vapic points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->raw points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->vapic points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->vapic points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3637:1-3637:1)
[Info][Unsound] Unknown value in {&tdvps_fv.guest_extension_state} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3681:5-3681:93)
[Info][Unsound] Unknown value in {&tdvps_fv.guest_extension_state.__annonCompField51.max_size} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3658:5-3658:73)
[Warning][Unknown] lval (& dest)->guest_extension_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3658:5-3658:73)
[Warning][Unknown] lval (& dest)->__annonCompField51.max_size points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->guest_extension_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->__annonCompField51.max_size points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->guest_extension_state points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (& dest)->__annonCompField51.max_size points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->guest_extension_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->__annonCompField51.max_size points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->guest_extension_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->__annonCompField51.max_size points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->guest_extension_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->__annonCompField51.max_size points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->guest_extension_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->__annonCompField51.max_size points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->guest_extension_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->__annonCompField51.max_size points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->guest_extension_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->__annonCompField51.max_size points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->guest_extension_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->__annonCompField51.max_size points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->guest_extension_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->__annonCompField51.max_size points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->guest_extension_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (& dest)->__annonCompField51.max_size points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->guest_extension_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (& dest)->__annonCompField51.max_size points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->guest_extension_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (& dest)->guest_extension_state points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3659:1-3659:1)
[Warning][Unknown] lval (& dest)->l2_vm_ctrl points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3661:14-3661:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((i == 3 || i == 2) || i == 1) || (0 == i && i == 0))) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.l2_vm_ctrl))) && dim0 == 3) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 3 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3661:14-3661:19)
[Warning][Unknown] lval (*(& dest))[i].l2_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].l2_vmcs points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (*(& dest))[i].l2_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].l2_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].l2_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].l2_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].l2_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].l2_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].l2_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].l2_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].l2_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].l2_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].l2_vmcs points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (*(& dest))[i].reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].reserved points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:42:170-42:173)
[Warning][Unknown] lval (*(& dest))[i].reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3472:10-3472:47)
[Warning][Unknown] lval (*(& dest))[i].reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3471:14-3471:19)
[Warning][Unknown] lval (*(& dest))[i].reserved points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3474:1-3474:1)
[Warning][Unknown] lval (*(& dest))[i].l2_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (*(& dest))[i].l2_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (*(& dest))[i].l2_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (*(& dest))[i].l2_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (*(& dest))[i].l2_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (*(& dest))[i].l2_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (*(& dest))[i].l2_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (*(& dest))[i].l2_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (*(& dest))[i].l2_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (*(& dest))[i].l2_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (*(& dest))[i].l2_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (*(& dest))[i].l2_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (*(& dest))[i].l2_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Warning][Unknown] lval (*(& dest))[i].l2_shadow_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (*(& dest))[i].l2_shadow_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:39:193-39:196)
[Warning][Unknown] lval (*(& dest))[i].l2_shadow_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (*(& dest))[i].l2_shadow_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (*(& dest))[i].l2_shadow_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (*(& dest))[i].l2_shadow_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (*(& dest))[i].l2_shadow_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (*(& dest))[i].l2_shadow_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (*(& dest))[i].l2_shadow_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (*(& dest))[i].l2_shadow_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (*(& dest))[i].l2_shadow_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3461:10-3461:51)
[Warning][Unknown] lval (*(& dest))[i].l2_shadow_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3460:14-3460:19)
[Warning][Unknown] lval (*(& dest))[i].l2_shadow_msr_bitmaps points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3463:1-3463:1)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((i == 3 || i == 2) || i == 1) || (0 == i && i == 0))) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.l2_vm_ctrl))) && dim0 == 3) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 3 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3661:14-3661:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((i == 3 || i == 2) || i == 1) || (0 == i && i == 0))) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.l2_vm_ctrl))) && dim0 == 3) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 3 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3661:14-3661:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((i == 3 || i == 2) || i == 1) || (0 == i && i == 0))) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.l2_vm_ctrl))) && dim0 == 3) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 3 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3661:14-3661:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((i == 3 || i == 2) || i == 1) || (0 == i && i == 0))) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.l2_vm_ctrl))) && dim0 == 3) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 3 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3661:14-3661:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (((i == 3 || i == 2) || i == 1) || (0 == i && i == 0))) && (unsigned long )((void *)dest) == (unsigned long )((void *)(& tdvps_fv.l2_vm_ctrl))) && dim0 == 3) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0) && 3 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3661:14-3661:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:14-4406:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:14-3454:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:14-3454:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:14-3454:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:14-3454:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:14-3454:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:14-3454:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:14-3454:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:14-3454:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:14-3454:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:14-3454:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:14-3454:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:14-3454:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:14-3454:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:14-3454:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:14-3454:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:14-3454:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:14-3454:19)
[Info][Witness] unassume invariant: ((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:14-3454:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:14-4406:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:14-4406:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:14-4406:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:14-4406:19)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U) && (((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && fv_vcpu_dr6 == 0ULL) && fv_vcpu_dr3 == 0ULL) && fv_vcpu_dr2 == 0ULL) && fv_vcpu_dr1 == 0ULL) && fv_vcpu_dr0 == 0ULL) && fv_vcpu_cr2 == 0ULL) && (int )fv_is_called_by_guest == 0) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && fv_msr_IA32_TSC_AUX == 0ULL) && fv_msr_IA32_KERNEL_GS_BASE == 0ULL) && fv_msr_IA32_GSBASE == 0ULL) && fv_msr_IA32_FSBASE == 0ULL) && fv_msr_IA32_FMASK == 0ULL) && fv_msr_IA32_LSTAR == 0ULL) && fv_msr_IA32_STAR == 0ULL) && fv_msr_IA32_UARCH_MISC_CTL == 0ULL) && fv_msr_IA32_X2APIC_SELF_IPI == 0ULL) && fv_msr_0x080E == 0ULL) && fv_msr_0x080C == 0ULL) && fv_msr_IA32_X2APIC_EOI == 0ULL) && fv_msr_IA32_X2APIC_PPR == 0ULL) && fv_msr_0x0809 == 0ULL) && fv_msr_IA32_X2APIC_TPR == 0ULL) && fv_msr_IA32_DS_AREA == 0ULL) && fv_msr_IA32_PAT == 0ULL) && fv_msr_IA32_SYSENTER_EIP == 0ULL) && fv_msr_IA32_SYSENTER_ESP == 0ULL) && fv_msr_IA32_SYSENTER_CS == 0ULL) && fv_msr_IA32_FLUSH_CMD == 0ULL) && fv_msr_IA32_PRED_CMD == 0ULL) && fv_msr_IA32_SPEC_CTRL == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL) && shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_td_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_td_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_td_regs_precall.__annonCompField8.rax == 0ULL) && shadow_td_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_td_regs_precall.__annonCompField8.r10 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL) && shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL) && (int )fv_exception_tracker_gp == 0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:14-4406:19)
[Info][Unsound] Unknown value in {&shadow_td_regs_precall.gprs} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3465:5-3465:71)
[Info][Unsound] Unknown value in {&shadow_vmm_regs_precall.gprs} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3465:5-3465:71)
[Info][Unsound] Unknown value in {&shadow_guest_gpr_state_precall.gprs} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3465:5-3465:71)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2099:10-2099:70)
[Info][Unsound] Unknown value in {&local_data_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2101:9-2101:57)
[Info][Unsound] Unknown address in {&local_data_fv} has escaped. (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2101:9-2101:57)
[Info][Unsound] Unknown value in {?} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2101:9-2101:57)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2076:14-2077:54)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2090:14-2090:92)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2091:14-2092:59)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2093:5-2093:80)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4424:5-4424:175)
[Warning][Integer > Overflow][CWE-191] Unsigned integer underflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4424:5-4424:175)
[Info][Unsound] Unknown value in {&local_data_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4804:5-4804:63)
[Info][Unsound] Unknown address in {&local_data_fv} has escaped. (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4804:5-4804:63)
[Info][Unsound] Unknown value in {&global_data_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4804:5-4804:63)
[Info][Unsound] Unknown value in {&sysinfo_table_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4804:5-4804:63)
[Info][Unsound] Unknown value in {&tdr_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4804:5-4804:63)
[Info][Unsound] Unknown value in {&tdcs_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4804:5-4804:63)
[Info][Unsound] Unknown value in {&tdvps_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4804:5-4804:63)
[Info][Unsound] Unknown value in {?} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4804:5-4804:63)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((i == 16U || i == 15U) || i == 14U) || i == 13U) || i == 12U) || i == 11U) || i == 10U) || i == 9U) || i == 8U) || i == 7U) || i == 6U) || i == 5U) || i == 4U) || i == 3U) || (2U == i && i == 2U)) && (((((((((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )tdx_local_data_ptr->sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )tdx_local_data_ptr->local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )tdx_local_data_ptr->global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )control.__annonCompField2.xmm_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.xmm_select) && (int )control.__annonCompField2.gpr_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.gpr_select) && (unsigned long )tdx_local_data_ptr == (unsigned long )(& local_data_fv)) && (int )fv_is_called_by_guest == 1) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && (unsigned long )local_data_fv.vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )local_data_fv.vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )local_data_fv.vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )fv_exception_tracker_gp == 0) && 0ULL == td_exit_qual.raw (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:19-4772:24)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4780:17-4781:29)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((i == 16U || i == 15U) || i == 14U) || i == 13U) || i == 12U) || i == 11U) || i == 10U) || i == 9U) || i == 8U) || i == 7U) || i == 6U) || i == 5U) || i == 4U) || i == 3U) || (2U == i && i == 2U)) && (((((((((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )tdx_local_data_ptr->sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )tdx_local_data_ptr->local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )tdx_local_data_ptr->global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )control.__annonCompField2.xmm_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.xmm_select) && (int )control.__annonCompField2.gpr_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.gpr_select) && (unsigned long )tdx_local_data_ptr == (unsigned long )(& local_data_fv)) && (int )fv_is_called_by_guest == 1) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && (unsigned long )local_data_fv.vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )local_data_fv.vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )local_data_fv.vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )fv_exception_tracker_gp == 0) && 0ULL == td_exit_qual.raw (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:19-4772:24)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4780:17-4781:29)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((i == 16U || i == 15U) || i == 14U) || i == 13U) || i == 12U) || i == 11U) || i == 10U) || i == 9U) || i == 8U) || i == 7U) || i == 6U) || i == 5U) || i == 4U) || i == 3U) || (2U == i && i == 2U)) && (((((((((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )tdx_local_data_ptr->sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )tdx_local_data_ptr->local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )tdx_local_data_ptr->global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )control.__annonCompField2.xmm_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.xmm_select) && (int )control.__annonCompField2.gpr_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.gpr_select) && (unsigned long )tdx_local_data_ptr == (unsigned long )(& local_data_fv)) && (int )fv_is_called_by_guest == 1) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && (unsigned long )local_data_fv.vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )local_data_fv.vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )local_data_fv.vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )fv_exception_tracker_gp == 0) && 0ULL == td_exit_qual.raw (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:19-4772:24)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4780:17-4781:29)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((i == 16U || i == 15U) || i == 14U) || i == 13U) || i == 12U) || i == 11U) || i == 10U) || i == 9U) || i == 8U) || i == 7U) || i == 6U) || i == 5U) || i == 4U) || i == 3U) || (2U == i && i == 2U)) && (((((((((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )tdx_local_data_ptr->sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )tdx_local_data_ptr->local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )tdx_local_data_ptr->global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )control.__annonCompField2.xmm_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.xmm_select) && (int )control.__annonCompField2.gpr_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.gpr_select) && (unsigned long )tdx_local_data_ptr == (unsigned long )(& local_data_fv)) && (int )fv_is_called_by_guest == 1) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && (unsigned long )local_data_fv.vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )local_data_fv.vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )local_data_fv.vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )fv_exception_tracker_gp == 0) && 0ULL == td_exit_qual.raw (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:19-4772:24)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4780:17-4781:29)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((i == 16U || i == 15U) || i == 14U) || i == 13U) || i == 12U) || i == 11U) || i == 10U) || i == 9U) || i == 8U) || i == 7U) || i == 6U) || i == 5U) || i == 4U) || i == 3U) || (2U == i && i == 2U)) && (((((((((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )tdx_local_data_ptr->sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )tdx_local_data_ptr->local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )tdx_local_data_ptr->global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )control.__annonCompField2.xmm_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.xmm_select) && (int )control.__annonCompField2.gpr_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.gpr_select) && (unsigned long )tdx_local_data_ptr == (unsigned long )(& local_data_fv)) && (int )fv_is_called_by_guest == 1) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && (unsigned long )local_data_fv.vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )local_data_fv.vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )local_data_fv.vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )fv_exception_tracker_gp == 0) && 0ULL == td_exit_qual.raw (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:19-4772:24)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4780:17-4781:29)
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdr_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((i == 16U || i == 15U) || i == 14U) || i == 13U) || i == 12U) || i == 11U) || i == 10U) || i == 9U) || i == 8U) || i == 7U) || i == 6U) || i == 5U) || i == 4U) || i == 3U) || (2U == i && i == 2U)) && (((((((((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )tdx_local_data_ptr->sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )tdx_local_data_ptr->local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )tdx_local_data_ptr->global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )control.__annonCompField2.xmm_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.xmm_select) && (int )control.__annonCompField2.gpr_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.gpr_select) && (unsigned long )tdx_local_data_ptr == (unsigned long )(& local_data_fv)) && (int )fv_is_called_by_guest == 1) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && (unsigned long )local_data_fv.vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )local_data_fv.vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )local_data_fv.vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )fv_exception_tracker_gp == 0) && 0ULL == td_exit_qual.raw (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:19-4772:24)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4780:17-4781:29)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((i == 16U || i == 15U) || i == 14U) || i == 13U) || i == 12U) || i == 11U) || i == 10U) || i == 9U) || i == 8U) || i == 7U) || i == 6U) || i == 5U) || i == 4U) || i == 3U) || (2U == i && i == 2U)) && (((((((((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )tdx_local_data_ptr->sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )tdx_local_data_ptr->local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )tdx_local_data_ptr->global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )control.__annonCompField2.xmm_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.xmm_select) && (int )control.__annonCompField2.gpr_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.gpr_select) && (unsigned long )tdx_local_data_ptr == (unsigned long )(& local_data_fv)) && (int )fv_is_called_by_guest == 1) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && (unsigned long )local_data_fv.vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )local_data_fv.vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )local_data_fv.vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )fv_exception_tracker_gp == 0) && 0ULL == td_exit_qual.raw (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:19-4772:24)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4780:17-4781:29)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((i == 16U || i == 15U) || i == 14U) || i == 13U) || i == 12U) || i == 11U) || i == 10U) || i == 9U) || i == 8U) || i == 7U) || i == 6U) || i == 5U) || i == 4U) || i == 3U) || (2U == i && i == 2U)) && (((((((((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )tdx_local_data_ptr->sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )tdx_local_data_ptr->local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )tdx_local_data_ptr->global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )control.__annonCompField2.xmm_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.xmm_select) && (int )control.__annonCompField2.gpr_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.gpr_select) && (unsigned long )tdx_local_data_ptr == (unsigned long )(& local_data_fv)) && (int )fv_is_called_by_guest == 1) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && (unsigned long )local_data_fv.vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )local_data_fv.vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )local_data_fv.vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )fv_exception_tracker_gp == 0) && 0ULL == td_exit_qual.raw (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:19-4772:24)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4780:17-4781:29)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((i == 16U || i == 15U) || i == 14U) || i == 13U) || i == 12U) || i == 11U) || i == 10U) || i == 9U) || i == 8U) || i == 7U) || i == 6U) || i == 5U) || i == 4U) || i == 3U) || (2U == i && i == 2U)) && (((((((((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )tdx_local_data_ptr->sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )tdx_local_data_ptr->local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )tdx_local_data_ptr->global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )control.__annonCompField2.xmm_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.xmm_select) && (int )control.__annonCompField2.gpr_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.gpr_select) && (unsigned long )tdx_local_data_ptr == (unsigned long )(& local_data_fv)) && (int )fv_is_called_by_guest == 1) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && (unsigned long )local_data_fv.vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )local_data_fv.vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )local_data_fv.vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )fv_exception_tracker_gp == 0) && 0ULL == td_exit_qual.raw (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:19-4772:24)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4780:17-4781:29)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((i == 16U || i == 15U) || i == 14U) || i == 13U) || i == 12U) || i == 11U) || i == 10U) || i == 9U) || i == 8U) || i == 7U) || i == 6U) || i == 5U) || i == 4U) || i == 3U) || (2U == i && i == 2U)) && (((((((((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )tdx_local_data_ptr->sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )tdx_local_data_ptr->local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )tdx_local_data_ptr->global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )control.__annonCompField2.xmm_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.xmm_select) && (int )control.__annonCompField2.gpr_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.gpr_select) && (unsigned long )tdx_local_data_ptr == (unsigned long )(& local_data_fv)) && (int )fv_is_called_by_guest == 1) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && (unsigned long )local_data_fv.vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )local_data_fv.vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )local_data_fv.vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )fv_exception_tracker_gp == 0) && 0ULL == td_exit_qual.raw (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:19-4772:24)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4780:17-4781:29)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((i == 16U || i == 15U) || i == 14U) || i == 13U) || i == 12U) || i == 11U) || i == 10U) || i == 9U) || i == 8U) || i == 7U) || i == 6U) || i == 5U) || i == 4U) || i == 3U) || (2U == i && i == 2U)) && (((((((((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )tdx_local_data_ptr->sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )tdx_local_data_ptr->local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )tdx_local_data_ptr->global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )control.__annonCompField2.xmm_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.xmm_select) && (int )control.__annonCompField2.gpr_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.gpr_select) && (unsigned long )tdx_local_data_ptr == (unsigned long )(& local_data_fv)) && (int )fv_is_called_by_guest == 1) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && (unsigned long )local_data_fv.vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )local_data_fv.vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )local_data_fv.vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )fv_exception_tracker_gp == 0) && 0ULL == td_exit_qual.raw (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:19-4772:24)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4780:17-4781:29)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((i == 16U || i == 15U) || i == 14U) || i == 13U) || i == 12U) || i == 11U) || i == 10U) || i == 9U) || i == 8U) || i == 7U) || i == 6U) || i == 5U) || i == 4U) || i == 3U) || (2U == i && i == 2U)) && (((((((((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )tdx_local_data_ptr->sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )tdx_local_data_ptr->local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )tdx_local_data_ptr->global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )control.__annonCompField2.xmm_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.xmm_select) && (int )control.__annonCompField2.gpr_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.gpr_select) && (unsigned long )tdx_local_data_ptr == (unsigned long )(& local_data_fv)) && (int )fv_is_called_by_guest == 1) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && (unsigned long )local_data_fv.vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )local_data_fv.vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )local_data_fv.vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )fv_exception_tracker_gp == 0) && 0ULL == td_exit_qual.raw (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:19-4772:24)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4780:17-4781:29)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((i == 16U || i == 15U) || i == 14U) || i == 13U) || i == 12U) || i == 11U) || i == 10U) || i == 9U) || i == 8U) || i == 7U) || i == 6U) || i == 5U) || i == 4U) || i == 3U) || (2U == i && i == 2U)) && (((((((((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )tdx_local_data_ptr->sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )tdx_local_data_ptr->local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )tdx_local_data_ptr->global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )control.__annonCompField2.xmm_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.xmm_select) && (int )control.__annonCompField2.gpr_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.gpr_select) && (unsigned long )tdx_local_data_ptr == (unsigned long )(& local_data_fv)) && (int )fv_is_called_by_guest == 1) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && (unsigned long )local_data_fv.vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )local_data_fv.vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )local_data_fv.vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )fv_exception_tracker_gp == 0) && 0ULL == td_exit_qual.raw (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:19-4772:24)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4780:17-4781:29)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((i == 16U || i == 15U) || i == 14U) || i == 13U) || i == 12U) || i == 11U) || i == 10U) || i == 9U) || i == 8U) || i == 7U) || i == 6U) || i == 5U) || i == 4U) || i == 3U) || (2U == i && i == 2U)) && (((((((((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )tdx_local_data_ptr->sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )tdx_local_data_ptr->local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )tdx_local_data_ptr->global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )control.__annonCompField2.xmm_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.xmm_select) && (int )control.__annonCompField2.gpr_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.gpr_select) && (unsigned long )tdx_local_data_ptr == (unsigned long )(& local_data_fv)) && (int )fv_is_called_by_guest == 1) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && (unsigned long )local_data_fv.vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )local_data_fv.vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )local_data_fv.vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )fv_exception_tracker_gp == 0) && 0ULL == td_exit_qual.raw (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:19-4772:24)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4780:17-4781:29)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((i == 16U || i == 15U) || i == 14U) || i == 13U) || i == 12U) || i == 11U) || i == 10U) || i == 9U) || i == 8U) || i == 7U) || i == 6U) || i == 5U) || i == 4U) || i == 3U) || (2U == i && i == 2U)) && (((((((((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )tdx_local_data_ptr->sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )tdx_local_data_ptr->local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )tdx_local_data_ptr->global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )control.__annonCompField2.xmm_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.xmm_select) && (int )control.__annonCompField2.gpr_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.gpr_select) && (unsigned long )tdx_local_data_ptr == (unsigned long )(& local_data_fv)) && (int )fv_is_called_by_guest == 1) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && (unsigned long )local_data_fv.vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )local_data_fv.vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )local_data_fv.vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )fv_exception_tracker_gp == 0) && 0ULL == td_exit_qual.raw (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:19-4772:24)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4780:17-4781:29)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((i == 16U || i == 15U) || i == 14U) || i == 13U) || i == 12U) || i == 11U) || i == 10U) || i == 9U) || i == 8U) || i == 7U) || i == 6U) || i == 5U) || i == 4U) || i == 3U) || (2U == i && i == 2U)) && (((((((((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )tdx_local_data_ptr->sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )tdx_local_data_ptr->local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )tdx_local_data_ptr->global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )control.__annonCompField2.xmm_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.xmm_select) && (int )control.__annonCompField2.gpr_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.gpr_select) && (unsigned long )tdx_local_data_ptr == (unsigned long )(& local_data_fv)) && (int )fv_is_called_by_guest == 1) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && (unsigned long )local_data_fv.vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )local_data_fv.vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )local_data_fv.vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )fv_exception_tracker_gp == 0) && 0ULL == td_exit_qual.raw (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:19-4772:24)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4780:17-4781:29)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((i == 16U || i == 15U) || i == 14U) || i == 13U) || i == 12U) || i == 11U) || i == 10U) || i == 9U) || i == 8U) || i == 7U) || i == 6U) || i == 5U) || i == 4U) || i == 3U) || (2U == i && i == 2U)) && (((((((((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )tdx_local_data_ptr->sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )tdx_local_data_ptr->local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )tdx_local_data_ptr->global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )control.__annonCompField2.xmm_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.xmm_select) && (int )control.__annonCompField2.gpr_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.gpr_select) && (unsigned long )tdx_local_data_ptr == (unsigned long )(& local_data_fv)) && (int )fv_is_called_by_guest == 1) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && (unsigned long )local_data_fv.vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )local_data_fv.vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )local_data_fv.vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )fv_exception_tracker_gp == 0) && 0ULL == td_exit_qual.raw (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:19-4772:24)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4780:17-4781:29)
[Info][Witness] unassume invariant: (((((((((((((((((((((((((((((((((((((((i == 16U || i == 15U) || i == 14U) || i == 13U) || i == 12U) || i == 11U) || i == 10U) || i == 9U) || i == 8U) || i == 7U) || i == 6U) || i == 5U) || i == 4U) || i == 3U) || (2U == i && i == 2U)) && (((((((((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 3U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 4U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 5U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 6U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 7U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 8U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 9U) || (unsigned int )(local_data_fv.vp_ctx.tdcs)->management_fields.op_state == 10U)) && (((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U)) && ((((unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(tdx_local_data_ptr->vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 0U || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 1U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 2U) || (unsigned int )(local_data_fv.vp_ctx.tdr)->management_fields.lifecycle_state == 3U)) && ((((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )tdx_local_data_ptr->vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )tdx_local_data_ptr->sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )tdx_local_data_ptr->local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )tdx_local_data_ptr->global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )control.__annonCompField2.xmm_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.xmm_select) && (int )control.__annonCompField2.gpr_select == (int )td_exit_qual.__annonCompField13.__annonCompField12.__annonCompField11.gpr_select) && (unsigned long )tdx_local_data_ptr == (unsigned long )(& local_data_fv)) && (int )fv_is_called_by_guest == 1) && (int )fv_is_called_by_host == 0) && (int )fv_exception_tracker_ve == 0) && (unsigned long )local_data_fv.vp_ctx.tdvps == (unsigned long )(& tdvps_fv)) && (unsigned long )local_data_fv.vp_ctx.tdr == (unsigned long )(& tdr_fv)) && (unsigned long )local_data_fv.vp_ctx.tdcs == (unsigned long )(& tdcs_fv)) && (unsigned long )local_data_fv.sysinfo_fast_ref_ptr == (unsigned long )((void *)(& sysinfo_table_fv))) && (unsigned long )local_data_fv.local_data_fast_ref_ptr == (unsigned long )((void *)(& local_data_fv))) && (unsigned long )local_data_fv.global_data_fast_ref_ptr == (unsigned long )((void *)(& global_data_fv))) && (int )fv_exception_tracker_gp == 0) && 0ULL == td_exit_qual.raw (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4772:19-4772:24)
[Info][Unsound] Unknown value in {&local_data_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5038:9-5038:73)
[Info][Unsound] Unknown address in {&local_data_fv} has escaped. (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5038:9-5038:73)
[Info][Unsound] Unknown value in {&tdcs_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5038:9-5038:73)
[Info][Unsound] Unknown value in {&global_data_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5038:9-5038:73)
[Info][Unsound] Unknown value in {&sysinfo_table_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5038:9-5038:73)
[Info][Unsound] Unknown value in {&tdr_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5038:9-5038:73)
[Info][Unsound] Unknown value in {&tdvps_fv} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5038:9-5038:73)
[Info][Unsound] Unknown value in {?} could be an escaped pointer address! (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5038:9-5038:73)
[Warning][Unknown] lval (& tdx_local_data_ptr)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4949:24-4949:57)
[Warning][Unknown] lval (& tdx_local_data_ptr)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4949:24-4949:57)
[Warning][Unknown] lval (& tdx_local_data_ptr)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4950:12-4950:54)
[Warning][Unknown] lval (& tdx_local_data_ptr)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4953:9-4953:64)
[Warning][Unknown] lval (& tdx_local_data_ptr)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1201:12-1201:37)
[Warning][Unknown] lval (& tdx_local_data_ptr)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (lib/sv-comp/stub/src/sv-comp.c:44:170-44:173)
[Warning][Unknown] lval (& tdx_local_data_ptr)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:910:56-910:81)
[Warning][Unknown] lval (& tdx_local_data_ptr)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:910:56-910:81)
[Warning][Unknown] lval (& tdx_local_data_ptr)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2458:16-2458:38)
[Warning][Unknown] lval (& tdx_local_data_ptr)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2458:16-2458:38)
[Warning][Unknown] lval (& tdx_local_data_ptr)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1201:12-1201:37)
[Warning][Unknown] lval (& tdx_local_data_ptr)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4954:9-4954:68)
[Warning][Unknown] lval (& tdx_local_data_ptr)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2462:16-2462:38)
[Warning][Unknown] lval (& tdx_local_data_ptr)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2462:16-2462:38)
[Warning][Unknown] lval (& tdx_local_data_ptr)->vp_ctx points to a non-local variable. Invalid pointer dereference may occur (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3432:155-3432:185)
[Warning][Deadcode] Function 'TDXFV_NONDET_uint16t' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:909:1-909:84)
[Warning][Deadcode] Function 'ia32_invalidate_tlb_entries' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1182:1-1185:1)
[Warning][Deadcode] Function 'ia32_clear_ac' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1186:1-1189:1)
[Warning][Deadcode] Function 'ia32_ud2' is uncalled: 3 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1194:1-1198:1)
[Warning][Deadcode] Function 'ia32_wrmsr' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1203:1-1206:1)
[Warning][Deadcode] Function 'ia32_xgetbv' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1207:1-1211:1)
[Warning][Deadcode] Function 'ia32_xsetbv' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1212:1-1215:1)
[Warning][Deadcode] Function 'ia32_xsaves' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1216:1-1219:1)
[Warning][Deadcode] Function 'ia32_xrstors' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1220:1-1223:1)
[Warning][Deadcode] Function 'ia32_load_cr2' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1224:1-1227:1)
[Warning][Deadcode] Function 'ia32_load_dr0' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1228:1-1231:1)
[Warning][Deadcode] Function 'ia32_load_dr1' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1232:1-1235:1)
[Warning][Deadcode] Function 'ia32_load_dr2' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1236:1-1239:1)
[Warning][Deadcode] Function 'ia32_load_dr3' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1240:1-1243:1)
[Warning][Deadcode] Function 'ia32_load_dr6' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1244:1-1247:1)
[Warning][Deadcode] Function 'ia32_store_dr0' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1252:1-1255:1)
[Warning][Deadcode] Function 'ia32_store_dr1' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1256:1-1259:1)
[Warning][Deadcode] Function 'ia32_store_dr2' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1260:1-1263:1)
[Warning][Deadcode] Function 'ia32_store_dr3' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1264:1-1267:1)
[Warning][Deadcode] Function 'ia32_store_dr6' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1268:1-1271:1)
[Warning][Deadcode] Function '_lock_xadd_16b' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1272:1-1276:1)
[Warning][Deadcode] Function '_lock_and_16b' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1277:1-1280:1)
[Warning][Deadcode] Function 'load_xmms_from_buffer' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1284:1-1287:1)
[Warning][Deadcode] Function 'release_sharex_lock_hp_sh' is uncalled: 3 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1354:1-1360:1)
[Warning][Deadcode] Function 'release_sharex_lock_hp_ex' is uncalled: 3 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1361:1-1366:1)
[Warning][Deadcode] Function 'release_sharex_lock_hp' is uncalled: 8 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:1367:1-1380:1)
[Warning][Deadcode] Function 'ia32_vmread' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2109:1-2112:1)
[Warning][Deadcode] Function 'ia32_vmptrld' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2118:1-2120:1)
[Warning][Deadcode] Function 'set_hkid_to_pa' is uncalled: 4 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2138:1-2144:1)
[Warning][Deadcode] Function 'map_pa_with_hkid' is uncalled: 3 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2145:1-2150:1)
[Warning][Deadcode] Function 'map_pa_with_global_hkid' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2151:1-2155:1)
[Warning][Deadcode] Function 'tdx_memcpy' is uncalled: 3 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2158:1-2163:1)
[Warning][Deadcode] Function 'set_seam_vmcs_as_active' is uncalled: 4 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2164:1-2170:1)
[Warning][Deadcode] Function 'current_vmcs_guest_rip_advance' is uncalled: 6 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2171:1-2181:1)
[Warning][Deadcode] Function 'save_guest_td_extended_state' is uncalled: 4 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2182:1-2187:1)
[Warning][Deadcode] Function 'wrmsr_opt' is uncalled: 3 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2188:1-2194:1)
[Warning][Deadcode] Function 'tdxfv_abst_exception_insert_gp' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2286:1-2288:1)
[Warning][Deadcode] Function 'tdxfv_abst_exception_insert_ve' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2289:1-2291:1)
[Warning][Deadcode] Function 'tdxfv_abst_msr_write' is uncalled: 402 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2880:1-3417:1)
[Warning][Deadcode] Function 'tdxfv_abst_vcpu_write_cr2' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3433:1-3433:201)
[Warning][Deadcode] Function 'tdxfv_abst_vcpu_read_dr0' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3434:1-3434:199)
[Warning][Deadcode] Function 'tdxfv_abst_vcpu_write_dr0' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3435:1-3435:201)
[Warning][Deadcode] Function 'tdxfv_abst_vcpu_read_dr1' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3436:1-3436:199)
[Warning][Deadcode] Function 'tdxfv_abst_vcpu_write_dr1' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3437:1-3437:201)
[Warning][Deadcode] Function 'tdxfv_abst_vcpu_read_dr2' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3438:1-3438:199)
[Warning][Deadcode] Function 'tdxfv_abst_vcpu_write_dr2' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3439:1-3439:201)
[Warning][Deadcode] Function 'tdxfv_abst_vcpu_read_dr3' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3440:1-3440:199)
[Warning][Deadcode] Function 'tdxfv_abst_vcpu_write_dr3' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3441:1-3441:201)
[Warning][Deadcode] Function 'tdxfv_abst_vcpu_read_dr6' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3442:1-3442:199)
[Warning][Deadcode] Function 'tdxfv_abst_vcpu_write_dr6' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3443:1-3443:201)
[Warning][Deadcode] Function 'basic_memset' is uncalled: 3 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4463:1-4467:1)
[Warning][Deadcode] Function 'basic_memset_to_zero' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4468:1-4471:1)
[Warning][Deadcode] Function 'initialize_extended_state' is uncalled: 4 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4472:1-4477:1)
[Warning][Deadcode] Function 'set_guest_pde_bs' is uncalled: 6 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4478:1-4488:1)
[Warning][Deadcode] Function 'advance_guest_rip' is uncalled: 4 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4489:1-4494:1)
[Warning][Deadcode] Function 'clear_movss_sti_blocking' is uncalled: 6 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4495:1-4505:1)
[Warning][Deadcode] Function 'tdx_report_error_and_halt' is uncalled: 3 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4507:1-4514:1)
[Warning][Deadcode] Function 'tdx_arch_fatal_error' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4515:1-4518:1)
[Warning][Deadcode] Function 'la_from_keyhole_idx' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4519:1-4524:1)
[Warning][Deadcode] Function 'keyhole_idx_from_la' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4525:1-4533:1)
[Warning][Deadcode] Function 'fill_keyhole_pte' is uncalled: 17 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4534:1-4557:1)
[Warning][Deadcode] Function 'hash_pa' is uncalled: 6 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4558:1-4567:1)
[Warning][Deadcode] Function 'hash_table_find_entry' is uncalled: 14 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4568:1-4593:1)
[Warning][Deadcode] Function 'hash_table_remove_entry' is uncalled: 11 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4594:1-4613:1)
[Warning][Deadcode] Function 'hash_table_insert_entry' is uncalled: 7 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4614:1-4622:1)
[Warning][Deadcode] Function 'lru_cache_remove_entry' is uncalled: 12 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4623:1-4646:1)
[Warning][Deadcode] Function 'lru_cache_add_head_entry' is uncalled: 9 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4647:1-4661:1)
[Warning][Deadcode] Function 'map_pa_with_memtype' is uncalled: 32 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4662:1-4706:1)
[Warning][Deadcode] Function 'map_pa' is uncalled: 1 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4707:1-4710:1)
[Warning][Deadcode] Function 'free_la' is uncalled: 12 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4711:1-4729:1)
[Warning][Deadcode] Function 'pamt_unwalk' is uncalled: 22 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4730:1-4758:1)
[Warning][Deadcode] Function 'pamt_implicit_release_lock' is uncalled: 3 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4759:1-4763:1)
[Warning][Deadcode] Function 'load_xmms_by_mask' is uncalled: 7 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4819:1-4832:1)
[Warning][Deadcode] Function 'init_all_dr_opt' is uncalled: 11 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4833:1-4855:1)
[Warning][Deadcode] Function 'init_msr_opt' is uncalled: 9 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4856:1-4879:1)
[Warning][Deadcode] Function 'load_vmm_state_before_td_exit' is uncalled: 39 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4880:1-4946:1)
[Warning][Deadcode] Function 'write_l2_enter_outputs' is uncalled: 11 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5015:1-5028:1)
[Warning][Deadcode] Function 'mark_lp_as_free' is uncalled: 2 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5066:1-5069:1)
[Warning][Deadcode] Function 'tdx_vmm_post_dispatching' is uncalled: 10 LLoC (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5070:1-5085:1)
[Warning][Deadcode] Function 'main' does not return
[Warning][Deadcode] Function '__VERIFIER_assert' has dead code:
  on line 900 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:900-900)
  on line 903 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:903-903)
[Warning][Deadcode] Function 'main' has dead code:
  on line 5092 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5092-5092)
[Warning][Deadcode] Function 'save_guest_td_state_before_td_exit' has dead code:
  on lines 4957..4964 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4957-4964)
  on line 4966 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4966-4966)
  on line 4968 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4968-4968)
  on lines 4970..4971 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4970-4971)
  on line 4973 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4973-4973)
  on line 4975 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4975-4975)
  on line 4978 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4978-4978)
  on lines 4980..4981 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4980-4981)
  on line 4983 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4983-4983)
  on line 4985 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4985-4985)
  on lines 4987..4988 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4987-4988)
  on line 4990 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4990-4990)
  on lines 4992..4995 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4992-4995)
  on line 4997 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4997-4997)
  on line 5000 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5000-5000)
  on line 5002 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5002-5002)
  on line 5004 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5004-5004)
  on line 5006 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5006-5006)
  on lines 5008..5014 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5008-5014)
[Warning][Deadcode] Function 'td_vmexit_to_vmm' has dead code:
  on lines 5039..5041 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5039-5041)
  on line 5043 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5043-5043)
  on lines 5045..5046 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5045-5046)
  on line 5048 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5048-5048)
  on lines 5050..5051 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5050-5051)
  on lines 5053..5058 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5053-5058)
  on line 5060 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5060-5060)
  on lines 5062..5064 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5062-5064)
[Warning][Deadcode] Function 'tdg_vp_vmcall__post_cover_success' has dead code:
  on lines 2278..2279 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2278-2279)
[Warning][Deadcode] Function 'tdxfv_abst_msr_read' has dead code:
  on line 2369 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2369-2369)
  on line 2372 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2372-2372)
  on line 2375 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2375-2375)
  on lines 2378..2379 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2378-2379)
  on lines 2382..2383 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2382-2383)
  on lines 2386..2387 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2386-2387)
  on lines 2390..2391 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2390-2391)
  on lines 2394..2395 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2394-2395)
  on lines 2398..2399 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2398-2399)
  on lines 2402..2403 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2402-2403)
  on line 2406 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2406-2406)
  on lines 2409..2410 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2409-2410)
  on lines 2413..2414 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2413-2414)
  on lines 2417..2418 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2417-2418)
  on lines 2421..2422 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2421-2422)
  on line 2425 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2425-2425)
  on lines 2428..2429 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2428-2429)
  on line 2432 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2432-2432)
  on line 2435 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2435-2435)
  on line 2438 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2438-2438)
  on lines 2441..2442 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2441-2442)
  on lines 2445..2446 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2445-2446)
  on lines 2449..2450 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2449-2450)
  on lines 2453..2454 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2453-2454)
  on lines 2464..2466 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2464-2466)
  on lines 2468..2470 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2468-2470)
  on lines 2472..2474 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2472-2474)
  on lines 2476..2478 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2476-2478)
  on lines 2480..2482 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2480-2482)
  on lines 2484..2485 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2484-2485)
  on lines 2487..2489 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2487-2489)
  on lines 2491..2493 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2491-2493)
  on lines 2495..2497 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2495-2497)
  on lines 2499..2501 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2499-2501)
  on lines 2503..2505 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2503-2505)
  on lines 2507..2509 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2507-2509)
  on lines 2511..2513 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2511-2513)
  on lines 2515..2517 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2515-2517)
  on lines 2519..2521 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2519-2521)
  on lines 2523..2525 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2523-2525)
  on lines 2527..2529 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2527-2529)
  on lines 2531..2533 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2531-2533)
  on lines 2535..2537 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2535-2537)
  on lines 2539..2541 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2539-2541)
  on lines 2543..2545 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2543-2545)
  on lines 2547..2549 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2547-2549)
  on lines 2551..2553 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2551-2553)
  on lines 2555..2557 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2555-2557)
  on lines 2559..2561 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2559-2561)
  on lines 2563..2565 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2563-2565)
  on lines 2567..2569 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2567-2569)
  on lines 2571..2573 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2571-2573)
  on lines 2575..2577 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2575-2577)
  on lines 2579..2581 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2579-2581)
  on lines 2583..2585 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2583-2585)
  on lines 2587..2589 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2587-2589)
  on lines 2591..2593 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2591-2593)
  on lines 2595..2597 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2595-2597)
  on lines 2599..2601 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2599-2601)
  on lines 2603..2605 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2603-2605)
  on lines 2607..2609 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2607-2609)
  on lines 2611..2613 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2611-2613)
  on lines 2615..2617 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2615-2617)
  on lines 2619..2621 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2619-2621)
  on lines 2623..2625 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2623-2625)
  on lines 2627..2629 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2627-2629)
  on lines 2631..2633 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2631-2633)
  on lines 2635..2637 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2635-2637)
  on lines 2639..2641 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2639-2641)
  on lines 2643..2645 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2643-2645)
  on lines 2647..2649 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2647-2649)
  on lines 2651..2653 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2651-2653)
  on lines 2655..2657 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2655-2657)
  on lines 2659..2661 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2659-2661)
  on lines 2663..2665 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2663-2665)
  on lines 2667..2669 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2667-2669)
  on lines 2671..2673 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2671-2673)
  on lines 2675..2676 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2675-2676)
  on lines 2678..2680 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2678-2680)
  on lines 2682..2684 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2682-2684)
  on lines 2686..2688 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2686-2688)
  on lines 2690..2692 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2690-2692)
  on lines 2694..2696 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2694-2696)
  on lines 2698..2700 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2698-2700)
  on lines 2702..2704 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2702-2704)
  on lines 2706..2708 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2706-2708)
  on lines 2710..2712 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2710-2712)
  on lines 2714..2716 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2714-2716)
  on lines 2718..2720 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2718-2720)
  on lines 2722..2724 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2722-2724)
  on lines 2726..2727 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2726-2727)
  on lines 2729..2730 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2729-2730)
  on lines 2732..2733 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2732-2733)
  on lines 2735..2736 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2735-2736)
  on lines 2738..2739 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2738-2739)
  on lines 2741..2742 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2741-2742)
  on lines 2744..2745 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2744-2745)
  on lines 2747..2748 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2747-2748)
  on lines 2750..2751 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2750-2751)
  on lines 2753..2755 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2753-2755)
  on lines 2757..2759 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2757-2759)
  on lines 2761..2762 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2761-2762)
  on lines 2764..2766 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2764-2766)
  on lines 2768..2770 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2768-2770)
  on lines 2772..2774 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2772-2774)
  on lines 2776..2778 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2776-2778)
  on lines 2780..2782 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2780-2782)
  on lines 2784..2786 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2784-2786)
  on lines 2788..2790 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2788-2790)
  on lines 2792..2794 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2792-2794)
  on lines 2796..2798 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2796-2798)
  on lines 2800..2802 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2800-2802)
  on lines 2804..2806 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2804-2806)
  on lines 2808..2810 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2808-2810)
  on lines 2812..2814 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2812-2814)
  on lines 2816..2817 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2816-2817)
  on lines 2819..2821 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2819-2821)
  on lines 2823..2825 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2823-2825)
  on lines 2827..2828 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2827-2828)
  on lines 2830..2832 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2830-2832)
  on lines 2834..2836 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2834-2836)
  on lines 2838..2840 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2838-2840)
  on lines 2842..2844 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2842-2844)
  on lines 2846..2848 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2846-2848)
  on lines 2850..2851 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2850-2851)
  on lines 2853..2854 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2853-2854)
  on lines 2856..2857 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2856-2857)
  on lines 2859..2860 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2859-2860)
  on lines 2862..2863 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2862-2863)
  on lines 2865..2866 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2865-2866)
  on lines 2868..2869 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2868-2869)
  on lines 2871..2872 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2871-2872)
  on lines 2874..2875 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2874-2875)
  on lines 2877..2878 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2877-2878)
[Warning][Deadcode] Logical lines of code (LLoC) summary:
  live: 1172
  dead: 1181 (773 in uncalled functions)
  total lines: 2353
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'i___0 < 16' (possibly inserted by CIL) is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-570] condition 'addr == 16ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2368:9-2368:23)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'addr == 72ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2371:9-2371:23)
[Warning][Deadcode][CWE-571] condition 'i < dim0' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3864:9-3864:34)
[Warning][Deadcode][CWE-570] condition 'addr == 73ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2374:9-2374:23)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'addr == 135ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2377:9-2377:23)
[Warning][Deadcode][CWE-571] condition 'addr >= 140ULL' is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2381:9-2381:44)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-570] condition 'addr < 144ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2381:9-2381:44)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-570] condition 'addr == 152ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2385:9-2385:23)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'addr == 153ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2389:9-2389:23)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'addr == 154ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2393:9-2393:23)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-570] condition 'addr == 155ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2397:9-2397:23)
[Warning][Deadcode][CWE-570] condition 'i___0 < 16' (possibly inserted by CIL) is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'addr == 158ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2401:9-2401:23)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-570] condition 'addr == 188ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2405:9-2405:23)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-570] condition 'addr == 189ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2408:9-2408:23)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'addr >= 193ULL' is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2412:9-2412:44)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-570] condition 'addr < 201ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2412:9-2412:44)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-570] condition 'addr == 225ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2416:9-2416:23)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'addr == 266ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2420:9-2420:23)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'addr == 267ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2424:9-2424:23)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'addr == 290ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2427:9-2427:23)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i < dim0' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3715:9-3715:34)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'addr == 372ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2431:9-2431:23)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'addr == 373ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2434:9-2434:23)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-570] condition 'addr == 374ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2437:9-2437:23)
[Warning][Deadcode][CWE-571] condition 'addr >= 390ULL' is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2440:9-2440:44)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'addr < 398ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2440:9-2440:44)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'addr == 405ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2444:9-2444:23)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-570] condition 'addr == 416ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2448:9-2448:23)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'addr >= 422ULL' is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2452:9-2452:44)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-570] condition 'addr < 424ULL' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2452:9-2452:44)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'i___0 < 16' (possibly inserted by CIL) is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'addr == 453ULL' is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:2460:9-2460:23)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'i___0 < 16' (possibly inserted by CIL) is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'i___0 < 16' (possibly inserted by CIL) is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'i___0 < 16' (possibly inserted by CIL) is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'fv_is_called_by_host' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3432:44-3432:122)
[Warning][Deadcode][CWE-571] condition '! cond' is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:897:9-897:16)
[Warning][Deadcode][CWE-571] condition 'fv_is_called_by_guest' is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3432:44-3432:122)
[Warning][Deadcode][CWE-570] condition '(unsigned char)0' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3432:44-3432:122)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'i___0 < 16' (possibly inserted by CIL) is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-570] condition 'i___0 < 16' (possibly inserted by CIL) is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-570] condition 'i___0 < 16' (possibly inserted by CIL) is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition '! is_td_dead' is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:5036:9-5036:20)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
[Warning][Deadcode][CWE-570] condition 'i___0 < 16' (possibly inserted by CIL) is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:13-3873:36)
[Warning][Deadcode][CWE-571] condition 'i___0 < 16' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:13-3724:36)
__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdcs_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 
lib/libc/stub/src/stdlib.c:38: Warning: alignment attribute "__aligned__((4) *
                                                                          (1024) )" not understood on struct tdvps_s 

[Info] runtime: 00:03:29.442
[Info] vars: 11238, evals: 9241

[Info] |called|=0

Memory statistics: total=126705.21MB, max=5034.67MB, minor=115513.14MB, major=36150.88MB, promoted=24958.80MB
    minor collections=56716  major collections=517 compactions=4

[Success][Witness] invariant confirmed: 128 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_exception_tracker_gp == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_fmask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_lstar == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_star == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xfd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xss == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.xcr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SPEC_CTRL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_PRED_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FLUSH_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_CS == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_ESP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_EIP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_PAT == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_DS_AREA == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_TPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_0x0809 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_PPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_EOI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_0x080C == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_0x080E == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_SELF_IPI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_UARCH_MISC_CTL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_STAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_LSTAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FMASK == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_GSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_KERNEL_GS_BASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_TSC_AUX == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_exception_tracker_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_is_called_by_host == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_is_called_by_guest == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_vcpu_cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: dim0 == 128 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: (void *)dest == (void *)(& tdvps_fv.cpuid_control) (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
[Success][Witness] invariant confirmed: (((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Warning][Witness] invariant unconfirmed: ((((4 <= i && i <= 128) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0) (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: ((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3567:5)
[Success][Witness] invariant confirmed: 19 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_exception_tracker_gp == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.attributes_fixed0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.attributes_fixed1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.cpuid_last_base_leaf == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.cpuid_last_extended_leaf == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.fc_bitmap == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.l2_vmcs_values.entry_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.l2_vmcs_values.exit_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.l2_vmcs_values.pinbased_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.l2_vmcs_values.procbased_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.max_lbr_depth == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.native_model_info.__annonCompField30.core_type == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.num_fixed_ctrs == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.num_rdseed_pauses == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.num_rdseed_retries == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.family == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.model == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.processor_type == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CS.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.FS.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.GS.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.SS.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.TR.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.seamverifyreport_available == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.sha384_method.is_initialized == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.td_vmcs_values.entry_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.td_vmcs_values.exit_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.td_vmcs_values.pinbased_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.td_vmcs_values.procbased_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.td_vmcs_values.procbased_ctls2 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.code_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.code_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.data_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.data_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.keyhole_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.keyhole_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.min_update_hv == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.module_hv == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.no_downgrade == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.num_handoff_pages == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.num_stack_pages == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.num_tls_pages == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.seam_status == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.stack_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.stack_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdr_fv.key_management_fields.hkid == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdr_fv.management_fields.fatal == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdr_fv.td_preserving_fields.handoff_version == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.reserved_1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.topology_enum_configured == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.num_assoc_vcpus == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.num_l2_vms == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.num_vcpus == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.last_teeinfo_hash_valid == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.dirty_count == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.export_count == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.import_count == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_count == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_dec_key_set == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_epoch == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_version == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_working_version == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.num_migrated_vcpus == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.num_migs == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.total_mb_count == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.service_td_fields.servtd_num == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_fmask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_lstar == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_star == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xfd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xss == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.xcr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.assoc_lpid == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.cpuid_supervisor_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.cpuid_user_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.curr_vm == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.export_count == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.hp_lock_busy == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.hp_lock_busy_start == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.l2_exit_host_routed == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_epf_gpa_list_idx == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_exit_tsc == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_seamdb_index == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_td_exit == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.nmi_unblocking_due_to_iret == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.num_tdvps_pages == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.pend_nmi == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.possibly_epf_stepping == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.reserved_0 == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_pid_hpa == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_pinbased_exec_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_posted_int_notification_vector == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.state == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.vcpu_epoch == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.vcpu_index == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.xfam == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.eptp_index == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.exit_qualification == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.exit_reason == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.gla == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.gpa == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.valid == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SPEC_CTRL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_PRED_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FLUSH_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_CS == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_ESP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_EIP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_PAT == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_DS_AREA == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_TPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_0x0809 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_PPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_EOI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_0x080C == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_0x080E == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_SELF_IPI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_UARCH_MISC_CTL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_STAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_LSTAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FMASK == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_GSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_KERNEL_GS_BASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_TSC_AUX == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_exception_tracker_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_is_called_by_host == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_is_called_by_guest == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_vcpu_cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: dim0 == 19 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: (unsigned char )tdcs_fv.executions_ctl_fields.gpaw == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Warning][Witness] invariant unconfirmed: (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: (unsigned int )tdr_fv.management_fields.num_tdcx == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Warning][Witness] invariant unconfirmed: (unsigned int )tdcs_fv.management_fields.op_state == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: (unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: (void *)dest == (void *)(& global_data_fv.xsave_comp) (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Warning][Witness] invariant unconfirmed: ((((4 <= i && i <= 19) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0) (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3815:5)
[Success][Witness] invariant confirmed: 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_exception_tracker_gp == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_fmask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_lstar == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_star == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xfd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xss == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.xcr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_pid_hpa == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_pinbased_exec_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_posted_int_notification_vector == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SPEC_CTRL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_PRED_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FLUSH_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_CS == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_ESP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_EIP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_PAT == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_DS_AREA == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_TPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_0x0809 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_PPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_EOI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_0x080C == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_0x080E == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_SELF_IPI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_UARCH_MISC_CTL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_STAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_LSTAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FMASK == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_GSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_KERNEL_GS_BASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_TSC_AUX == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_exception_tracker_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_is_called_by_host == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_is_called_by_guest == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_vcpu_cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: dim0 == 4 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: (void *)dest == (void *)(& tdvps_fv.management.l2_ctls) (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
[Success][Witness] invariant confirmed: (((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Warning][Witness] invariant unconfirmed: (((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0) (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: ((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3487:5)
[Success][Witness] invariant confirmed: fv_exception_tracker_gp == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SPEC_CTRL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_PRED_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FLUSH_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_CS == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_ESP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_EIP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_PAT == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_DS_AREA == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_TPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_0x0809 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_PPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_EOI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_0x080C == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_0x080E == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_SELF_IPI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_UARCH_MISC_CTL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_STAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_LSTAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FMASK == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_GSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_KERNEL_GS_BASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_TSC_AUX == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_exception_tracker_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_is_called_by_host == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_is_called_by_guest == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_vcpu_cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: (((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: ((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Warning][Witness] invariant unconfirmed: (((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0) (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3454:5)
[Success][Witness] invariant confirmed: 1 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_exception_tracker_gp == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_fmask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_lstar == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_star == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xfd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xss == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.xcr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.assoc_lpid == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.cpuid_supervisor_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.cpuid_user_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.curr_vm == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.export_count == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.hp_lock_busy == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.hp_lock_busy_start == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.l2_exit_host_routed == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_epf_gpa_list_idx == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_exit_tsc == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_seamdb_index == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_td_exit == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.nmi_unblocking_due_to_iret == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.num_tdvps_pages == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.pend_nmi == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.possibly_epf_stepping == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.reserved_0 == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_pid_hpa == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_pinbased_exec_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_posted_int_notification_vector == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.state == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.vcpu_epoch == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.vcpu_index == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.xfam == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.eptp_index == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.exit_qualification == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.exit_reason == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.gla == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.gpa == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.valid == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SPEC_CTRL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_PRED_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FLUSH_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_CS == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_ESP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_EIP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_PAT == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_DS_AREA == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_TPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_0x0809 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_PPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_EOI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_0x080C == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_0x080E == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_SELF_IPI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_UARCH_MISC_CTL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_STAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_LSTAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FMASK == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_GSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_KERNEL_GS_BASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_TSC_AUX == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_exception_tracker_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_is_called_by_host == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_is_called_by_guest == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_vcpu_cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: dim0 == 1 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: (void *)dest == (void *)(& tdcs_fv.service_td_fields.servtd_bindings_table) (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
[Warning][Witness] invariant unconfirmed: i == 1 || (0 == i && i == 0) (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: (((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: ((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4199:5)
[Success][Witness] invariant confirmed: 68 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_exception_tracker_gp == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.attributes_fixed0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.attributes_fixed1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.cpuid_last_base_leaf == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.cpuid_last_extended_leaf == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.fc_bitmap == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.l2_vmcs_values.entry_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.l2_vmcs_values.exit_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.l2_vmcs_values.pinbased_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.l2_vmcs_values.procbased_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.max_lbr_depth == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.native_model_info.__annonCompField30.core_type == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.num_fixed_ctrs == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.num_rdseed_pauses == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.num_rdseed_retries == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.family == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.model == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.processor_type == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CS.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.FS.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.GS.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.SS.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.TR.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.seamverifyreport_available == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.sha384_method.is_initialized == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.td_vmcs_values.entry_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.td_vmcs_values.exit_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.td_vmcs_values.pinbased_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.td_vmcs_values.procbased_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.td_vmcs_values.procbased_ctls2 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.code_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.code_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.data_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.data_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.keyhole_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.keyhole_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.min_update_hv == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.module_hv == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.no_downgrade == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.num_handoff_pages == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.num_stack_pages == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.num_tls_pages == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.seam_status == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.stack_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: sysinfo_table_fv.stack_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdr_fv.key_management_fields.hkid == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdr_fv.management_fields.fatal == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdr_fv.td_preserving_fields.handoff_version == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.reserved_1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.topology_enum_configured == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.num_assoc_vcpus == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.num_l2_vms == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.num_vcpus == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.last_teeinfo_hash_valid == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.dirty_count == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.export_count == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.import_count == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_count == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_dec_key_set == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_epoch == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_version == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_working_version == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.num_migrated_vcpus == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.num_migs == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.total_mb_count == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.service_td_fields.servtd_num == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_fmask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_lstar == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_star == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xfd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xss == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.xcr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.assoc_lpid == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.cpuid_supervisor_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.cpuid_user_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.curr_vm == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.export_count == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.hp_lock_busy == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.hp_lock_busy_start == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.l2_exit_host_routed == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_epf_gpa_list_idx == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_exit_tsc == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_seamdb_index == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_td_exit == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.nmi_unblocking_due_to_iret == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.num_tdvps_pages == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.pend_nmi == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.possibly_epf_stepping == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.reserved_0 == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_pid_hpa == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_pinbased_exec_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_posted_int_notification_vector == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.state == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.vcpu_epoch == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.vcpu_index == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.xfam == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.eptp_index == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.exit_qualification == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.exit_reason == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.gla == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.gpa == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.valid == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SPEC_CTRL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_PRED_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FLUSH_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_CS == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_ESP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_EIP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_PAT == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_DS_AREA == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_TPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_0x0809 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_PPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_EOI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_0x080C == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_0x080E == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_SELF_IPI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_UARCH_MISC_CTL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_STAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_LSTAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FMASK == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_GSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_KERNEL_GS_BASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_TSC_AUX == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_exception_tracker_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_is_called_by_host == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_is_called_by_guest == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_vcpu_cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: dim0 == 68 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: (unsigned char )tdcs_fv.executions_ctl_fields.gpaw == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Warning][Witness] invariant unconfirmed: (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: (unsigned int )tdr_fv.management_fields.num_tdcx == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Warning][Witness] invariant unconfirmed: (unsigned int )tdcs_fv.management_fields.op_state == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: (unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: (void *)dest == (void *)(& global_data_fv.cpuid_values) (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Warning][Witness] invariant unconfirmed: ((((4 <= i && i <= 68) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0) (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3827:5)
[Success][Witness] invariant confirmed: 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_exception_tracker_gp == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.native_model_info.__annonCompField30.core_type == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.num_rdseed_pauses == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.num_rdseed_retries == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.family == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.model == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.processor_type == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.seamverifyreport_available == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: global_data_fv.sha384_method.is_initialized == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.code_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.code_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.data_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.data_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.keyhole_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.keyhole_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.min_update_hv == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.module_hv == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.no_downgrade == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.num_handoff_pages == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.num_stack_pages == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.num_tls_pages == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.seam_status == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.stack_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.stack_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdr_fv.key_management_fields.hkid == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdr_fv.management_fields.fatal == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdr_fv.td_preserving_fields.handoff_version == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)

[Info] runtime: 00:03:40.239
[Info] vars: 11238, evals: 9241

[Info] |called|=0

Memory statistics: total=133097.62MB, max=5034.67MB, minor=121628.61MB, major=37322.26MB, promoted=25853.25MB
    minor collections=59638  major collections=529 compactions=6

[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.reserved_1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.topology_enum_configured == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.num_assoc_vcpus == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.num_l2_vms == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.num_vcpus == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.last_teeinfo_hash_valid == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.dirty_count == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.export_count == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.import_count == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_count == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_dec_key_set == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_epoch == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_version == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_working_version == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.num_migrated_vcpus == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.num_migs == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.total_mb_count == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.service_td_fields.servtd_num == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_fmask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_lstar == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_star == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xfd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xss == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)

[Info] runtime: 00:03:50.258
[Info] vars: 11238, evals: 9241

[Info] |called|=0

Memory statistics: total=140464.54MB, max=5034.67MB, minor=128662.33MB, major=38711.25MB, promoted=26909.03MB
    minor collections=62998  major collections=542 compactions=6

[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.xcr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.assoc_lpid == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.cpuid_supervisor_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.cpuid_user_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.curr_vm == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.export_count == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.hp_lock_busy == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.hp_lock_busy_start == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.l2_exit_host_routed == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_epf_gpa_list_idx == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_exit_tsc == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_seamdb_index == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_td_exit == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.nmi_unblocking_due_to_iret == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.num_tdvps_pages == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.pend_nmi == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.possibly_epf_stepping == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.reserved_0 == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_pid_hpa == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_pinbased_exec_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_posted_int_notification_vector == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.state == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.vcpu_epoch == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.vcpu_index == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.management.xfam == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.eptp_index == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.exit_qualification == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.exit_reason == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.gla == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.gpa == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.valid == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_SPEC_CTRL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_PRED_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_FLUSH_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_CS == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_ESP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_EIP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_PAT == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_DS_AREA == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_TPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_0x0809 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_PPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_EOI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_0x080C == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_0x080E == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_SELF_IPI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_UARCH_MISC_CTL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_STAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_LSTAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_FMASK == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_FSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_GSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_KERNEL_GS_BASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_msr_IA32_TSC_AUX == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_exception_tracker_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_is_called_by_host == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_is_called_by_guest == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_vcpu_cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_vcpu_dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_vcpu_dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_vcpu_dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_vcpu_dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: fv_vcpu_dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: dim0 == 64 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: (unsigned char )tdcs_fv.executions_ctl_fields.gpaw == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Warning][Witness] invariant unconfirmed: (unsigned int )tdr_fv.management_fields.lifecycle_state == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: (unsigned int )tdr_fv.management_fields.num_tdcx == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: (unsigned int )tdcs_fv.executions_ctl_fields.max_vcpus == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: (unsigned int )tdcs_fv.executions_ctl_fields.xbuff_size == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Warning][Witness] invariant unconfirmed: (unsigned int )tdcs_fv.management_fields.op_state == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: (unsigned short )tdcs_fv.executions_ctl_fields.tsc_frequency == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: (unsigned long long )tdr_fv.key_management_fields.pkg_config_bitmap == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: (unsigned long long )tdr_fv.management_fields.chldcnt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: (unsigned long long )tdr_fv.td_preserving_fields.seamdb_index == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: (unsigned long long )tdcs_fv.executions_ctl_fields.hp_lock_timeout == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: (unsigned long long )tdcs_fv.executions_ctl_fields.ia32_spec_ctrl_mask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_multiplier == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: (unsigned long long )tdcs_fv.executions_ctl_fields.tsc_offset == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: (unsigned long long )tdcs_fv.executions_ctl_fields.xfam == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: (void *)dest == (void *)(& global_data_fv.tdmr_info_copy) (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Warning][Witness] invariant unconfirmed: (((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((((4 <= i && i <= 63) && ((((((((((((((((i == 16 || i == 15) || i == 14) || i == 13) || i == 12) || i == 11) || i == 10) || i == 9) || i == 8) || i == 7) || i == 6) || i == 5) || i == 4) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0))) || (i == 3 && i == 16)) || (i == 3 && i == 15)) || (i == 3 && i == 14)) || (i == 3 && i == 13)) || (i == 3 && i == 12)) || (i == 3 && i == 11)) || (i == 3 && i == 10)) || (i == 3 && i == 9)) || (i == 3 && i == 8)) || (i == 3 && i == 7)) || (i == 3 && i == 6)) || (i == 3 && i == 5)) || (i == 3 && i == 4)) || (i == 3 && i == 3)) || (i == 3 && i == 2)) || (i == 3 && i == 1)) || ((0 == i && i == 3) && i == 0)) || (i == 2 && i == 16)) || (i == 2 && i == 15)) || (i == 2 && i == 14)) || (i == 2 && i == 13)) || (i == 2 && i == 12)) || (i == 2 && i == 11)) || (i == 2 && i == 10)) || (i == 2 && i == 9)) || (i == 2 && i == 8)) || (i == 2 && i == 7)) || (i == 2 && i == 6)) || (i == 2 && i == 5)) || (i == 2 && i == 4)) || (i == 2 && i == 3)) || (i == 2 && i == 2)) || (i == 2 && i == 1)) || ((0 == i && i == 2) && i == 0)) || (i == 1 && i == 16)) || (i == 1 && i == 15)) || (i == 1 && i == 14)) || (i == 1 && i == 13)) || (i == 1 && i == 12)) || (i == 1 && i == 11)) || (i == 1 && i == 10)) || (i == 1 && i == 9)) || (i == 1 && i == 8)) || (i == 1 && i == 7)) || (i == 1 && i == 6)) || (i == 1 && i == 5)) || (i == 1 && i == 4)) || (i == 1 && i == 3)) || (i == 1 && i == 2)) || (i == 1 && i == 1)) || ((0 == i && i == 1) && i == 0)) || ((0 == i && i == 0) && i == 16)) || ((0 == i && i == 0) && i == 15)) || ((0 == i && i == 0) && i == 14)) || ((0 == i && i == 0) && i == 13)) || ((0 == i && i == 0) && i == 12)) || ((0 == i && i == 0) && i == 11)) || ((0 == i && i == 0) && i == 10)) || ((0 == i && i == 0) && i == 9)) || ((0 == i && i == 0) && i == 8)) || ((0 == i && i == 0) && i == 7)) || ((0 == i && i == 0) && i == 6)) || ((0 == i && i == 0) && i == 5)) || ((0 == i && i == 0) && i == 4)) || ((0 == i && i == 0) && i == 3)) || ((0 == i && i == 0) && i == 2)) || ((0 == i && i == 0) && i == 1)) || ((((0 == i && 0 == i) && i == 0) && i == i) && i == 0) (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3873:9)
[Success][Witness] invariant confirmed: 511 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_exception_tracker_gp == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_fmask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_lstar == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_star == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xfd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xss == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.xcr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.assoc_lpid == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.cpuid_supervisor_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.cpuid_user_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.curr_vm == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.export_count == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.hp_lock_busy == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.hp_lock_busy_start == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.l2_exit_host_routed == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_epf_gpa_list_idx == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_exit_tsc == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_seamdb_index == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.last_td_exit == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.nmi_unblocking_due_to_iret == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.num_tdvps_pages == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.pend_nmi == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.possibly_epf_stepping == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.reserved_0 == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_pid_hpa == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_pinbased_exec_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_posted_int_notification_vector == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.state == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.vcpu_epoch == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.vcpu_index == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.xfam == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_info == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.__annonCompField47.__annonCompField46.instruction_length == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.eptp_index == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.exit_qualification == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.exit_reason == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.gla == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.gpa == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: tdvps_fv.ve_info.valid == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SPEC_CTRL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_PRED_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FLUSH_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_CS == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_ESP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_EIP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_PAT == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_DS_AREA == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_TPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_0x0809 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_PPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_EOI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_0x080C == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_0x080E == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_SELF_IPI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_UARCH_MISC_CTL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_STAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_LSTAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FMASK == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_GSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_KERNEL_GS_BASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_TSC_AUX == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_exception_tracker_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_is_called_by_host == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_is_called_by_guest == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_vcpu_cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: dim0 == 511 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: (void *)dest == (void *)(& tdcs_fv.__annonCompField70.__annonCompField69.f_migsc_links) (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdcs_s 
[Success][Witness] invariant confirmed: (((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Warning][Witness] invariant unconfirmed: ((((4 <= i && i <= 511) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0) (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: ((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4219:5)
[Success][Witness] invariant confirmed: fv_exception_tracker_gp == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SPEC_CTRL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_PRED_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FLUSH_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_CS == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_ESP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_EIP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_PAT == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_DS_AREA == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_TPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_0x0809 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_PPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_EOI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_0x080C == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_0x080E == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_SELF_IPI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_UARCH_MISC_CTL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_STAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_LSTAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FMASK == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_GSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_KERNEL_GS_BASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_TSC_AUX == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_exception_tracker_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_is_called_by_host == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_is_called_by_guest == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_vcpu_cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: (((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Warning][Witness] invariant unconfirmed: ((((4 <= i && i <= 64) || i == 3) || i == 2) || i == 1) || (0 == i && i == 0) (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: ((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:4406:5)
[Success][Witness] invariant confirmed: 4 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_exception_tracker_gp == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_fmask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_lstar == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_star == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xfd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xss == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.dont_backup_wk == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.non_random_wk == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.iwk_flags.__annonCompField28.reserved == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.vcpu_state_details.__annonCompField48.vmxip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.xcr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr0_guest_host_mask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr0_read_shadow == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr4_guest_host_mask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.base_l2_cr4_read_shadow == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_pid_hpa == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_pinbased_exec_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: tdvps_fv.management.shadow_posted_int_notification_vector == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_vmm_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_td_regs_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.r9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rax == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rbx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rcx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rdx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: shadow_guest_gpr_state_precall.__annonCompField8.rsp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SPEC_CTRL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_PRED_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FLUSH_CMD == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_CS == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_ESP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_SYSENTER_EIP == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_PAT == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_DS_AREA == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_TPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_0x0809 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_PPR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_EOI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_0x080C == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_0x080E == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_X2APIC_SELF_IPI == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_UARCH_MISC_CTL == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_STAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_LSTAR == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FMASK == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_FSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_GSBASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_KERNEL_GS_BASE == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_msr_IA32_TSC_AUX == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_exception_tracker_ve == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_is_called_by_host == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_is_called_by_guest == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_vcpu_cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: fv_vcpu_dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: dim0 == 4 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: (void *)dest == (void *)(& tdvps_fv.management.l2_debug_ctls) (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492: Warning: alignment attribute "__aligned__((4) *
                                                                                                                                                             (1024) )" not understood on struct tdvps_s 
[Success][Witness] invariant confirmed: (((unsigned int )tdr_fv.management_fields.lifecycle_state == 0U || (unsigned int )tdr_fv.management_fields.lifecycle_state == 1U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 2U) || (unsigned int )tdr_fv.management_fields.lifecycle_state == 3U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Warning][Witness] invariant unconfirmed: (((i == 4 || i == 3) || i == 2) || i == 1) || (0 == i && i == 0) (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: ((((((((((unsigned int )tdcs_fv.management_fields.op_state == 0U || (unsigned int )tdcs_fv.management_fields.op_state == 1U) || (unsigned int )tdcs_fv.management_fields.op_state == 2U) || (unsigned int )tdcs_fv.management_fields.op_state == 3U) || (unsigned int )tdcs_fv.management_fields.op_state == 4U) || (unsigned int )tdcs_fv.management_fields.op_state == 5U) || (unsigned int )tdcs_fv.management_fields.op_state == 6U) || (unsigned int )tdcs_fv.management_fields.op_state == 7U) || (unsigned int )tdcs_fv.management_fields.op_state == 8U) || (unsigned int )tdcs_fv.management_fields.op_state == 9U) || (unsigned int )tdcs_fv.management_fields.op_state == 10U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3492:5)
[Success][Witness] invariant confirmed: 64 == dim0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: fv_exception_tracker_gp == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.attributes_fixed0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.attributes_fixed1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed0.__annonCompField7.flexible_pending_ve == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed0.__annonCompField7.gpaw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed0.__annonCompField7.no_rbp_mod == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed0.__annonCompField7.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed1.__annonCompField7.flexible_pending_ve == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed1.__annonCompField7.gpaw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed1.__annonCompField7.no_rbp_mod == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.config_flags_fixed1.__annonCompField7.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.cpuid_last_base_leaf == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.cpuid_last_extended_leaf == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.crystal_clock_frequency == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.ddpd_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.fc_bitmap == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.hle_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.ia32_xss_supported_mask == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.kl_loadiwk_no_backup == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.l2_vmcs_values.entry_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.l2_vmcs_values.exit_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.l2_vmcs_values.pinbased_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.l2_vmcs_values.procbased_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.l2_vmcs_values.procbased_ctls2 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.l2_vmcs_values.procbased_ctls3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.la57_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.lam_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.lass_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.max_lbr_depth == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.native_model_info.__annonCompField30.core_type == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.native_model_info.__annonCompField30.native_model_id == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.native_tsc_frequency == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.num_fixed_ctrs == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.num_of_cached_sub_blocks == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.num_of_tdmr_entries == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.num_rdseed_pauses == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.num_rdseed_retries == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.perfmon_ext_leaf_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.extende_model_id == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.extended_family_id == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)

[Info] runtime: 00:04:00.278
[Info] vars: 11238, evals: 9241

[Info] |called|=0

Memory statistics: total=148920.51MB, max=5034.67MB, minor=136802.00MB, major=40125.15MB, promoted=28006.64MB
    minor collections=66886  major collections=555 compactions=6

[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.family == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.model == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.processor_type == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.rsvd0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.rsvd1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.platform_fms.__annonCompField29.stepping_id == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.bhi_no == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.doitm == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.energy_filtering_ctl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fb_clear_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.fbsdp_no == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.if_pschange_mc_no == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.irbs_all == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mcu_ctls == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.mds_no == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.misc_package_ctls == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.overclocking_status == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.pbrsb_no == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.psdp_no == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rdcl_no == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.reserved_3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rrsba == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.rsba == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.sbdr_ssdp_no == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.skip_l1dfl_vmentry == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.ssb_no == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.taa_no == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.tsx_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_arch_capabilities.__annonCompField41.xapic_disable_status == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.fusa_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.lam_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rar_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.rsm_in_cpl0_only == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.snoop_filter_qos_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.split_lock_disable_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.stlb_qos_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_lock_disable_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_core_capabilities.__annonCompField40.uc_store_throttlin_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.energy_filtering_enable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_misc_package_ctls.__annonCompField42.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.fix == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.prmrr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.rsvd2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.seamrr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.smrr_lock == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.vcnt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_mtrrcap.__annonCompField58.wc == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.freeze_while_smm_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.full_write == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.lbr_format == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_output_pt_avail == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_records_encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_save_arch_regs == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.pebs_trap_indicator == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.perf_metrics_available == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_perf_capabilities.__annonCompField35.rsvd2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_128_with_integrity == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_aes_xts_256_with_integrity == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.algs_rsvd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.key_select == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.lock == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.mk_tme_keyid_bits == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.rsvd1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.save_key_for_standby == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.sgx_tem_enable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tdx_reserved_keyid_bits == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_enc_bypass_enable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_activate.__annonCompField32.tme_policy == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_128_with_integrity == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.aes_xts_256_with_integrity == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.implicit_bit_mask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keyid_bits == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.mk_tme_max_keys == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.nm_encryption_disable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.rsvd2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_capability.__annonCompField33.tme_enc_bypass_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_mktme_kids == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tme_keyid_partitioning.__annonCompField34.num_tdx_priv_kids == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_tsc_adjust == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_ept_vpid_cap == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.enable_hlat == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ept_paging_write_control == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.gpaw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.guest_paging_verification == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.ipi_virtualization == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.loadiwkey_exiting == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_procbased_ctls3.__annonCompField17.virt_ia32_spec_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.legacy_xapic_disabled == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.plt_common_config.ia32_xapic_disable_status.__annonCompField43.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.rtm_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.capabilities == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamdb_clear == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamdb_getref == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamdb_insert == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamdb_report == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)

[Info] runtime: 00:04:10.295
[Info] vars: 11238, evals: 9241

[Info] |called|=0

Memory statistics: total=156218.56MB, max=5034.67MB, minor=143770.02MB, major=41502.81MB, promoted=29054.26MB
    minor collections=70215  major collections=568 compactions=6

[Success][Witness] invariant confirmed: global_data_fv.seam_capabilities.__annonCompField16.seamreport == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CR0.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CR0.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CR3.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CR3.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CR4.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CR4.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CS.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.CS.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.FS.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.FS.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.FS_BASE.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.FS_BASE.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.GDTR_BASE.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.GDTR_BASE.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.GS.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.GS.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IA32_EFER.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IA32_EFER.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IA32_PAT.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IA32_PAT.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IA32_S_CET.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IA32_S_CET.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IDTR_BASE.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.IDTR_BASE.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.SS.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.SS.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.TR.encoding == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seam_vmcs_host_values.TR.value == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seamrr_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seamrr_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.seamverifyreport_available == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.sha384_method.is_initialized == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.td_vmcs_values.entry_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.td_vmcs_values.exit_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.td_vmcs_values.pinbased_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.td_vmcs_values.procbased_ctls == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.td_vmcs_values.procbased_ctls2 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.td_vmcs_values.procbased_ctls3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.waitpkg_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.x2apic_core_id_mask == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.x2apic_core_id_shift_count == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.x2apic_pkg_id_shift_count == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.xcr0_supported_mask == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.xfd_faulting_mask == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: global_data_fv.xfd_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.smrr2_not_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.tdx_without_integrity == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_lps == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.tot_num_sockets == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.__annonCompField71.mcheck_fields.version == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.code_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.code_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.data_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.data_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.keyhole_edit_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.keyhole_edit_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.keyhole_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.keyhole_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.min_update_hv == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.module_hv == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.no_downgrade == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.num_handoff_pages == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.num_stack_pages == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.num_tls_pages == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.seam_status == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.stack_rgn_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: sysinfo_table_fv.stack_rgn_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdr_fv.key_management_fields.hkid == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdr_fv.management_fields.fatal == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdr_fv.td_preserving_fields.handoff_version == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.epoch_tracking.epoch_and_refcount.__annonCompField65.__annonCompField64.td_epoch == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.epoch_tracking.epoch_lock.__annonCompField55.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.debug == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.kl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.lass == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.migratable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.perfmon == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.pks == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_other == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_sec == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.reserved_tud == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.attributes.__annonCompField6.sept_ve_disable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.flexible_pending_ve == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.gpaw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.no_rbp_mod == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.config_flags.__annonCompField7.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.dca_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.ddpd_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.fred_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.la57_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.monitor_mwait_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.pconfig_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.perfmon_ext_leaf_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.tme_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.tsc_deadline_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.tsx_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.waitpkg_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.cpuid_flags.xfd_supported == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.base_pa == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.enable_ad_bits == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.enable_sss_control == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.ept_ps_mt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.ept_pwl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.eptp.fields.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.notify_ept_faults == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.notify_enables.__annonCompField66.reserved_63_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.reserved_1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.secure_ept_lock.__annonCompField55.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.enum_topology == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.pending_ve_disable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.td_ctls.__annonCompField68.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.executions_ctl_fields.topology_enum_configured == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.num_assoc_vcpus == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.num_l2_vms == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.num_vcpus == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.op_state_lock.__annonCompField56.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.op_state_lock.__annonCompField56.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.management_fields.op_state_lock.__annonCompField56.host_prio == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.last_teeinfo_hash_valid == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.rtmr_lock.__annonCompField56.host_prio == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.measurement_fields.td_sha_ctx.last_init_seamdb_index == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.bw_epoch.__annonCompField61.export_count == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_epoch == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.bw_epoch.__annonCompField61.mig_flag == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.dirty_count == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.export_count == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.import_count == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_count == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_dec_key_set == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_epoch == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_lock.__annonCompField55.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_lock.__annonCompField55.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_version == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.mig_working_version == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.num_migrated_vcpus == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.num_migs == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.migration_fields.total_mb_count == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.counter == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.exclusive == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.service_td_fields.servtd_bindings_lock.__annonCompField56.host_prio == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.service_td_fields.servtd_num == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_arch_capabilities == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.dual_monitor == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.ia32_vmx_true_available == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.rsvd2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_mt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_region_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmcs_revision_id == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmexit_info_on_ios == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.vmxon_pa_width == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_basic.__annonCompField36.voe_without_err_code == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.am == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.cd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.em == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.et == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.mp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ne == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.nw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.pg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.reserved_3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.ts == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed0.__annonCompField19.wp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.am == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.cd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.em == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.et == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.mp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ne == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.nw == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.pg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.reserved_3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.ts == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr0_fixed1.__annonCompField19.wp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.cet == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.de == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.fsgsbase == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.keylocker == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.la57 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.lass == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.mce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osfxsr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxmmexcpt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.osxsave == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pae == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pcide == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pge == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pke == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pks == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pse == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.pvi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smap == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smep == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.smxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.tsd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.uintr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.umip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vme == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed0.__annonCompField20.vmxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.cet == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.de == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.fsgsbase == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.keylocker == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.la57 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.lass == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.mce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osfxsr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxmmexcpt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.osxsave == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pae == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pce == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pcide == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pge == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pke == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pks == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pse == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.pvi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smap == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)

[Info] runtime: 00:04:20.319
[Info] vars: 11238, evals: 9241

[Info] |called|=0

Memory statistics: total=163585.63MB, max=5034.67MB, minor=150803.48MB, major=42896.46MB, promoted=30114.31MB
    minor collections=73575  major collections=581 compactions=6

[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smep == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.smxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.tsd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.uintr == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.umip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vme == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_cr4_fixed1.__annonCompField20.vmxe == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ad_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.advanced_vmexit_info_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invept_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.all_context_invvpid_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.exe_only_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.hlat_prefix_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.individual_addr_invvpid_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invept_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.invvpid_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml4_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.pml5_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_1g_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.ps_2m_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_4 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_5 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_7 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.reserved_9 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invept_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_context_invvpid_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.single_contx_retaining_globals_invvpid_supp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.sss_support == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.uc_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_ept_vpid_cap.__annonCompField38.wb_supported == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_exit_ctls2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_hlt == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_shutdown == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.activity_wait_for_sipi == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smbase == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.ia32_smm_monitor_ctl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_cr3_targets == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.max_msr_list_size == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.mseg_rev_id == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.pt_in_vmx == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.reserved_1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.unrestricted_guest == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmwrite_any_vmcs_field == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.vmx_preempt_timer_tsc_factor == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_misc.__annonCompField37.voe_with_0_instr_length == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls2.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_procbased_ctls3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_entry_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_exit_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_pinbased_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.allowed1 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_true_procbased_ctls.__annonCompField39.not_allowed0 == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdcs_fv.virt_msrs.virt_ia32_vmx_vmfunc == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fcw == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fdp == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fip == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fop == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.fsw == (unsigned short)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.ftw == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.mxcsr_mask == 0U (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.legacy_region.reserved_0 == (unsigned char)0 (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xcomp_bv == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_extension_state.__annonCompField51.xbuf.xsave_header.xstate_bv == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_ds_area == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_fixed_ctr_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_fmask == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_kernel_gs_base == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_lbr_depth == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_lstar == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_data_cfg == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_enable == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_frontend == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_pebs_ld_lat == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_perf_global_status == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_perf_metrics == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_spec_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_star == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_tsc_aux == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_tsx_ctrl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_uarch_misc_ctl == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_umwait_control == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xfd == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xfd_err == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_msr_state.ia32_xss == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.cr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr0 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr1 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr2 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr3 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.dr6 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r10 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r11 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r12 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r13 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r14 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r15 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gpr_state.__annonCompField8.r8 == 0ULL (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/intel-tdx-module/tdg_vp_vmcall__cover__success_havoc_object.i:3724:9)
[Success][Witness] invariant confirmed: tdvps_fv.guest_state.gp